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@@ -56,6 +56,7 @@
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#define MMC_MODE_HS (MMC_CAP(MMC_HS) | MMC_CAP(SD_HS))
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#define MMC_MODE_HS (MMC_CAP(MMC_HS) | MMC_CAP(SD_HS))
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#define MMC_MODE_HS_52MHz MMC_CAP(MMC_HS_52)
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#define MMC_MODE_HS_52MHz MMC_CAP(MMC_HS_52)
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#define MMC_MODE_DDR_52MHz MMC_CAP(MMC_DDR_52)
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#define MMC_MODE_DDR_52MHz MMC_CAP(MMC_DDR_52)
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+#define MMC_MODE_HS200 MMC_CAP(MMC_HS_200)
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#define MMC_MODE_8BIT BIT(30)
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#define MMC_MODE_8BIT BIT(30)
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#define MMC_MODE_4BIT BIT(29)
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#define MMC_MODE_4BIT BIT(29)
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@@ -86,6 +87,7 @@
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#define MMC_CMD_SET_BLOCKLEN 16
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#define MMC_CMD_SET_BLOCKLEN 16
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#define MMC_CMD_READ_SINGLE_BLOCK 17
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#define MMC_CMD_READ_SINGLE_BLOCK 17
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#define MMC_CMD_READ_MULTIPLE_BLOCK 18
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#define MMC_CMD_READ_MULTIPLE_BLOCK 18
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+#define MMC_CMD_SEND_TUNING_BLOCK_HS200 21
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#define MMC_CMD_SET_BLOCK_COUNT 23
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#define MMC_CMD_SET_BLOCK_COUNT 23
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#define MMC_CMD_WRITE_SINGLE_BLOCK 24
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#define MMC_CMD_WRITE_SINGLE_BLOCK 24
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#define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
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#define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
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@@ -113,6 +115,13 @@
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#define SD_CMD_APP_SEND_OP_COND 41
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#define SD_CMD_APP_SEND_OP_COND 41
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#define SD_CMD_APP_SEND_SCR 51
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#define SD_CMD_APP_SEND_SCR 51
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+static inline bool mmc_is_tuning_cmd(uint cmdidx)
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+{
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+ if (cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200)
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+ return true;
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+ return false;
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+}
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+
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/* SCR definitions in different words */
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/* SCR definitions in different words */
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#define SD_HIGHSPEED_BUSY 0x00020000
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#define SD_HIGHSPEED_BUSY 0x00020000
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#define SD_HIGHSPEED_SUPPORTED 0x00020000
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#define SD_HIGHSPEED_SUPPORTED 0x00020000
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@@ -210,6 +219,13 @@
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#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
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#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
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| EXT_CSD_CARD_TYPE_DDR_1_2V)
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| EXT_CSD_CARD_TYPE_DDR_1_2V)
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+#define EXT_CSD_CARD_TYPE_HS200_1_8V BIT(4) /* Card can run at 200MHz */
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+ /* SDR mode @1.8V I/O */
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+#define EXT_CSD_CARD_TYPE_HS200_1_2V BIT(5) /* Card can run at 200MHz */
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+ /* SDR mode @1.2V I/O */
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+#define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \
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+ EXT_CSD_CARD_TYPE_HS200_1_2V)
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+
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#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
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#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
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#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
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#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
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#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
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#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
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@@ -219,6 +235,8 @@
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#define EXT_CSD_TIMING_LEGACY 0 /* no high speed */
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#define EXT_CSD_TIMING_LEGACY 0 /* no high speed */
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#define EXT_CSD_TIMING_HS 1 /* HS */
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#define EXT_CSD_TIMING_HS 1 /* HS */
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+#define EXT_CSD_TIMING_HS200 2 /* HS200 */
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+
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#define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
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#define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
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#define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
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#define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
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#define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
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#define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
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