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@@ -1174,6 +1174,62 @@ int fdtdec_decode_display_timing(const void *blob, int parent, int index,
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return ret;
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}
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+int fdtdec_setup_memory_size(void)
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+{
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+ int ret, mem;
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+ struct fdt_resource res;
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+
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+ mem = fdt_path_offset(gd->fdt_blob, "/memory");
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+ if (mem < 0) {
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+ debug("%s: Missing /memory node\n", __func__);
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+ return -EINVAL;
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+ }
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+
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+ ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res);
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+ if (ret != 0) {
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+ debug("%s: Unable to decode first memory bank\n", __func__);
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+ return -EINVAL;
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+ }
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+
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+ gd->ram_size = (phys_size_t)(res.end - res.start + 1);
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+ debug("%s: Initial DRAM size %llx\n", __func__, (u64)gd->ram_size);
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+
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+ return 0;
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+}
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+
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+#if defined(CONFIG_NR_DRAM_BANKS)
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+int fdtdec_setup_memory_banksize(void)
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+{
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+ int bank, ret, mem;
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+ struct fdt_resource res;
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+
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+ mem = fdt_path_offset(gd->fdt_blob, "/memory");
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+ if (mem < 0) {
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+ debug("%s: Missing /memory node\n", __func__);
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+ return -EINVAL;
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+ }
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+
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+ for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
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+ ret = fdt_get_resource(gd->fdt_blob, mem, "reg", bank, &res);
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+ if (ret == -FDT_ERR_NOTFOUND)
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+ break;
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+ if (ret != 0)
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+ return -EINVAL;
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+
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+ gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
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+ gd->bd->bi_dram[bank].size =
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+ (phys_size_t)(res.end - res.start + 1);
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+
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+ debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
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+ __func__, bank,
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+ (unsigned long long)gd->bd->bi_dram[bank].start,
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+ (unsigned long long)gd->bd->bi_dram[bank].size);
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+ }
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+
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+ return 0;
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+}
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+#endif
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+
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int fdtdec_setup(void)
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{
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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