Jelajahi Sumber

dm: Add a power sequencing uclass

Some devices need special sequences to be used when starting up. Add a
uclass for this. Drivers can be added to provide specific features as
needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass 9 tahun lalu
induk
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5fd6badbd2
5 mengubah file dengan 62 tambahan dan 0 penghapusan
  1. 18 0
      drivers/misc/Kconfig
  2. 1 0
      drivers/misc/Makefile
  3. 24 0
      drivers/misc/pwrseq-uclass.c
  4. 1 0
      include/dm/uclass-id.h
  5. 18 0
      include/pwrseq.h

+ 18 - 0
drivers/misc/Kconfig

@@ -90,6 +90,24 @@ config MXC_OCOTP
 	  Programmable memory pages that are stored on the some
 	  Freescale i.MX processors.
 
+config PWRSEQ
+	bool "Enable power-sequencing drivers"
+	depends on DM
+	help
+	  Power-sequencing drivers provide support for controlling power for
+	  devices. They are typically referenced by a phandle from another
+	  device. When the device is started up, its power sequence can be
+	  initiated.
+
+config SPL_PWRSEQ
+	bool "Enable power-sequencing drivers for SPL"
+	depends on PWRSEQ
+	help
+	  Power-sequencing drivers provide support for controlling power for
+	  devices. They are typically referenced by a phandle from another
+	  device. When the device is started up, its power sequence can be
+	  initiated.
+
 config PCA9551_LED
 	bool "Enable PCA9551 LED driver"
 	help

+ 1 - 0
drivers/misc/Makefile

@@ -24,6 +24,7 @@ obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
 obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o
 obj-$(CONFIG_NS87308) += ns87308.o
 obj-$(CONFIG_PDSP188x) += pdsp188x.o
+obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o
 obj-$(CONFIG_SANDBOX) += reset_sandbox.o
 ifdef CONFIG_DM_I2C
 obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o

+ 24 - 0
drivers/misc/pwrseq-uclass.c

@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <pwrseq.h>
+
+int pwrseq_set_power(struct udevice *dev, bool enable)
+{
+	struct pwrseq_ops *ops = pwrseq_get_ops(dev);
+
+	if (!ops->set_power)
+		return -ENOSYS;
+
+	return ops->set_power(dev, enable);
+}
+
+UCLASS_DRIVER(pwrseq) = {
+	.id		= UCLASS_PWRSEQ,
+	.name		= "pwrseq",
+};

+ 1 - 0
include/dm/uclass-id.h

@@ -51,6 +51,7 @@ enum uclass_id {
 	UCLASS_PINCTRL,		/* Pinctrl (pin muxing/configuration) device */
 	UCLASS_PINCONFIG,	/* Pin configuration node device */
 	UCLASS_PMIC,		/* PMIC I/O device */
+	UCLASS_PWRSEQ,		/* Power sequence device */
 	UCLASS_REGULATOR,	/* Regulator device */
 	UCLASS_RESET,		/* Reset device */
 	UCLASS_REMOTEPROC,	/* Remote Processor device */

+ 18 - 0
include/pwrseq.h

@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2013 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __pwrseq_h
+#define __pwrseq_h
+
+struct pwrseq_ops {
+	int (*set_power)(struct udevice *dev, bool enable);
+};
+
+#define pwrseq_get_ops(dev)	((struct pwrseq_ops *)(dev)->driver->ops)
+
+int pwrseq_set_power(struct udevice *dev, bool enable);
+
+#endif