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@@ -36,6 +36,11 @@ DECLARE_GLOBAL_DATA_PTR;
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#define SLINK_CMD_ENB (1 << 31)
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#define SLINK_CMD_ENB (1 << 31)
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#define SLINK_CMD_GO (1 << 30)
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#define SLINK_CMD_GO (1 << 30)
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#define SLINK_CMD_M_S (1 << 28)
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#define SLINK_CMD_M_S (1 << 28)
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+#define SLINK_CMD_IDLE_SCLK_DRIVE_LOW (0 << 24)
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+#define SLINK_CMD_IDLE_SCLK_DRIVE_HIGH (1 << 24)
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+#define SLINK_CMD_IDLE_SCLK_PULL_LOW (2 << 24)
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+#define SLINK_CMD_IDLE_SCLK_PULL_HIGH (3 << 24)
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+#define SLINK_CMD_IDLE_SCLK_MASK (3 << 24)
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#define SLINK_CMD_CK_SDA (1 << 21)
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#define SLINK_CMD_CK_SDA (1 << 21)
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#define SLINK_CMD_CS_POL (1 << 13)
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#define SLINK_CMD_CS_POL (1 << 13)
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#define SLINK_CMD_CS_VAL (1 << 12)
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#define SLINK_CMD_CS_VAL (1 << 12)
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@@ -331,6 +336,22 @@ static int tegra30_spi_set_speed(struct udevice *bus, uint speed)
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static int tegra30_spi_set_mode(struct udevice *bus, uint mode)
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static int tegra30_spi_set_mode(struct udevice *bus, uint mode)
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{
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{
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struct tegra30_spi_priv *priv = dev_get_priv(bus);
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struct tegra30_spi_priv *priv = dev_get_priv(bus);
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+ struct spi_regs *regs = priv->regs;
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+ u32 reg;
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+
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+ reg = readl(®s->command);
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+
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+ /* Set CPOL and CPHA */
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+ reg &= ~(SLINK_CMD_IDLE_SCLK_MASK | SLINK_CMD_CK_SDA);
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+ if (mode & SPI_CPHA)
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+ reg |= SLINK_CMD_CK_SDA;
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+
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+ if (mode & SPI_CPOL)
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+ reg |= SLINK_CMD_IDLE_SCLK_DRIVE_HIGH;
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+ else
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+ reg |= SLINK_CMD_IDLE_SCLK_DRIVE_LOW;
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+
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+ writel(reg, ®s->command);
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priv->mode = mode;
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priv->mode = mode;
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debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode);
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debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode);
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