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@@ -146,7 +146,6 @@
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/* SPL will load U-Boot from NAND offset 0x40000 */
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/* SPL will load U-Boot from NAND offset 0x40000 */
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_BASE
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#define CONFIG_SPL_NAND_BASE
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-#define CONFIG_SPL_NAND_BOOT
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00040000
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00040000
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#define CONFIG_SPL_PAD_TO 0x20000
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#define CONFIG_SPL_PAD_TO 0x20000
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/* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
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/* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
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