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arm: ls102xa: enable snooping for CAAM transactions

Enable snooping for CAAM read & write transactions by
programming the SCFG snoop configuration register:
SCFG_SNPCNFGCR[SECRDSNP]
SCFG_SNPCNFGCR[SECWRSNP]

Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
horia.geanta@freescale.com 9 年之前
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5757e06c69
共有 2 個文件被更改,包括 4 次插入0 次删除
  1. 3 0
      arch/arm/cpu/armv7/ls102xa/cpu.c
  2. 1 0
      arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h

+ 3 - 0
arch/arm/cpu/armv7/ls102xa/cpu.c

@@ -301,6 +301,7 @@ int arch_cpu_init(void)
 	void *epu_base = (void *)(CONFIG_SYS_DCSRBAR + EPU_BLOCK_OFFSET);
 	void *rcpm2_base =
 		(void *)(CONFIG_SYS_DCSRBAR + DCSR_RCPM2_BLOCK_OFFSET);
+	struct ccsr_scfg *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
 	u32 state;
 
 	/*
@@ -328,6 +329,8 @@ int arch_cpu_init(void)
 	 */
 	fsl_epu_clean(epu_base);
 
+	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SEC_RD_WR);
+
 	return 0;
 }
 

+ 1 - 0
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h

@@ -144,6 +144,7 @@ struct ccsr_gur {
 };
 
 #define SCFG_ETSECDMAMCR_LE_BD_FR	0x00000c00
+#define SCFG_SNPCNFGCR_SEC_RD_WR	0xc0000000
 #define SCFG_ETSECCMCR_GE2_CLK125	0x04000000
 #define SCFG_ETSECCMCR_GE0_CLK125	0x00000000
 #define SCFG_ETSECCMCR_GE1_CLK125	0x08000000