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@@ -25,12 +25,14 @@
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#define MXC_CPU_MX7S 0x71 /* dummy ID */
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#define MXC_CPU_MX7D 0x72
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#define MXC_CPU_MX8MQ 0x82
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+#define MXC_CPU_IMX8QXP 0x92 /* dummy ID */
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#define MXC_CPU_MX7ULP 0xE1 /* Temporally hard code */
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#define MXC_CPU_VF610 0xF6 /* dummy ID */
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#define MXC_SOC_MX6 0x60
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#define MXC_SOC_MX7 0x70
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#define MXC_SOC_MX8M 0x80
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+#define MXC_SOC_IMX8 0x90 /* dummy */
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#define MXC_SOC_MX7ULP 0xE0 /* dummy */
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#define CHIP_REV_1_0 0x10
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@@ -41,6 +43,9 @@
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#define CHIP_REV_2_5 0x25
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#define CHIP_REV_3_0 0x30
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+#define CHIP_REV_A 0x0
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+#define CHIP_REV_B 0x1
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+
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#define BOARD_REV_1_0 0x0
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#define BOARD_REV_2_0 0x1
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#define BOARD_VER_OFFSET 0x8
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