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@@ -273,8 +273,7 @@ struct exynos5_clock {
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unsigned int clkout_cmu_cpu_div_stat;
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unsigned char res8[0x5f8];
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unsigned int armclk_stopctrl;
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- unsigned int atclk_stopctrl;
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- unsigned char res9[0x8];
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+ unsigned char res9[0x0c];
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unsigned int parityfail_status;
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unsigned int parityfail_clear;
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unsigned char res10[0x8];
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@@ -323,259 +322,278 @@ struct exynos5_clock {
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unsigned char res19[0xf8];
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unsigned int div_core0;
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unsigned int div_core1;
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- unsigned char res20[0xf8];
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+ unsigned int div_sysrgt;
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+ unsigned char res20[0xf4];
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unsigned int div_stat_core0;
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unsigned int div_stat_core1;
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- unsigned char res21[0x2f8];
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+ unsigned int div_stat_sysrgt;
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+ unsigned char res21[0x2f4];
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unsigned int gate_ip_core;
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- unsigned char res22[0xfc];
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+ unsigned int gate_ip_sysrgt;
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+ unsigned char res22[0x8];
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+ unsigned int c2c_monitor;
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+ unsigned char res23[0xec];
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unsigned int clkout_cmu_core;
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unsigned int clkout_cmu_core_div_stat;
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- unsigned char res23[0x5f8];
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+ unsigned char res24[0x5f8];
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unsigned int dcgidx_map0;
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unsigned int dcgidx_map1;
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unsigned int dcgidx_map2;
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- unsigned char res24[0x14];
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+ unsigned char res25[0x14];
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unsigned int dcgperf_map0;
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unsigned int dcgperf_map1;
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- unsigned char res25[0x18];
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+ unsigned char res26[0x18];
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unsigned int dvcidx_map;
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- unsigned char res26[0x1c];
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+ unsigned char res27[0x1c];
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unsigned int freq_cpu;
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unsigned int freq_dpm;
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- unsigned char res27[0x18];
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+ unsigned char res28[0x18];
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unsigned int dvsemclk_en;
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unsigned int maxperf;
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- unsigned char res28[0x3478];
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+ unsigned char res29[0xf78];
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+ unsigned int c2c_config;
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+ unsigned char res30[0x24fc];
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unsigned int div_acp;
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- unsigned char res29[0xfc];
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+ unsigned char res31[0xfc];
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unsigned int div_stat_acp;
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- unsigned char res30[0x1fc];
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+ unsigned char res32[0x1fc];
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unsigned int gate_ip_acp;
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- unsigned char res31[0x1fc];
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+ unsigned char res33[0xfc];
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+ unsigned int div_syslft;
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+ unsigned char res34[0xc];
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+ unsigned int div_stat_syslft;
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+ unsigned char res35[0x1c];
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+ unsigned int gate_ip_syslft;
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+ unsigned char res36[0xcc];
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unsigned int clkout_cmu_acp;
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unsigned int clkout_cmu_acp_div_stat;
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- unsigned char res32[0x38f8];
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+ unsigned char res37[0x8];
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+ unsigned int ufmc_config;
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+ unsigned char res38[0x38ec];
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unsigned int div_isp0;
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unsigned int div_isp1;
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unsigned int div_isp2;
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- unsigned char res33[0xf4];
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+ unsigned char res39[0xf4];
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unsigned int div_stat_isp0;
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unsigned int div_stat_isp1;
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unsigned int div_stat_isp2;
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- unsigned char res34[0x3f4];
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+ unsigned char res40[0x3f4];
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unsigned int gate_ip_isp0;
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unsigned int gate_ip_isp1;
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- unsigned char res35[0xf8];
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+ unsigned char res41[0xf8];
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unsigned int gate_sclk_isp;
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- unsigned char res36[0xc];
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+ unsigned char res42[0xc];
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unsigned int mcuisp_pwr_ctrl;
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- unsigned char res37[0xec];
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+ unsigned char res43[0xec];
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unsigned int clkout_cmu_isp;
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unsigned int clkout_cmu_isp_div_stat;
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- unsigned char res38[0x3618];
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+ unsigned char res44[0x3618];
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unsigned int cpll_lock;
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- unsigned char res39[0xc];
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+ unsigned char res45[0xc];
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unsigned int epll_lock;
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- unsigned char res40[0xc];
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+ unsigned char res46[0xc];
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unsigned int vpll_lock;
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- unsigned char res41[0xdc];
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+ unsigned char res47[0xc];
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+ unsigned int gpll_lock;
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+ unsigned char res48[0xcc];
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unsigned int cpll_con0;
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unsigned int cpll_con1;
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- unsigned char res42[0x8];
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+ unsigned char res49[0x8];
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unsigned int epll_con0;
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unsigned int epll_con1;
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unsigned int epll_con2;
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- unsigned char res43[0x4];
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+ unsigned char res50[0x4];
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unsigned int vpll_con0;
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unsigned int vpll_con1;
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unsigned int vpll_con2;
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- unsigned char res44[0xc4];
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+ unsigned char res51[0x4];
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+ unsigned int gpll_con0;
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+ unsigned int gpll_con1;
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+ unsigned char res52[0xb8];
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unsigned int src_top0;
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unsigned int src_top1;
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unsigned int src_top2;
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unsigned int src_top3;
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unsigned int src_gscl;
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- unsigned int src_disp0_0;
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- unsigned int src_disp0_1;
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+ unsigned char res53[0x8];
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unsigned int src_disp1_0;
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- unsigned int src_disp1_1;
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- unsigned char res46[0xc];
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+ unsigned char res54[0x10];
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unsigned int src_mau;
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unsigned int src_fsys;
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- unsigned char res47[0x8];
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+ unsigned int src_gen;
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+ unsigned char res55[0x4];
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unsigned int src_peric0;
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unsigned int src_peric1;
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- unsigned char res48[0x18];
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+ unsigned char res56[0x18];
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unsigned int sclk_src_isp;
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- unsigned char res49[0x9c];
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+ unsigned char res57[0x9c];
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unsigned int src_mask_top;
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- unsigned char res50[0xc];
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+ unsigned char res58[0xc];
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unsigned int src_mask_gscl;
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- unsigned int src_mask_disp0_0;
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- unsigned int src_mask_disp0_1;
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+ unsigned char res59[0x8];
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unsigned int src_mask_disp1_0;
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- unsigned int src_mask_disp1_1;
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- unsigned int src_mask_maudio;
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- unsigned char res52[0x8];
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+ unsigned char res60[0x4];
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+ unsigned int src_mask_mau;
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+ unsigned char res61[0x8];
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unsigned int src_mask_fsys;
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- unsigned char res53[0xc];
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+ unsigned int src_mask_gen;
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+ unsigned char res62[0x8];
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unsigned int src_mask_peric0;
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unsigned int src_mask_peric1;
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- unsigned char res54[0x18];
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+ unsigned char res63[0x18];
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unsigned int src_mask_isp;
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- unsigned char res55[0x9c];
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+ unsigned char res67[0x9c];
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unsigned int mux_stat_top0;
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unsigned int mux_stat_top1;
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unsigned int mux_stat_top2;
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unsigned int mux_stat_top3;
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- unsigned char res56[0xf0];
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+ unsigned char res68[0xf0];
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unsigned int div_top0;
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unsigned int div_top1;
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- unsigned char res57[0x8];
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+ unsigned char res69[0x8];
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unsigned int div_gscl;
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- unsigned int div_disp0_0;
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- unsigned int div_disp0_1;
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+ unsigned char res70[0x8];
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unsigned int div_disp1_0;
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- unsigned int div_disp1_1;
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- unsigned char res59[0x8];
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+ unsigned char res71[0xc];
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unsigned int div_gen;
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- unsigned char res60[0x4];
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+ unsigned char res72[0x4];
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unsigned int div_mau;
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unsigned int div_fsys0;
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unsigned int div_fsys1;
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unsigned int div_fsys2;
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- unsigned int div_fsys3;
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+ unsigned char res73[0x4];
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unsigned int div_peric0;
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unsigned int div_peric1;
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unsigned int div_peric2;
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unsigned int div_peric3;
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unsigned int div_peric4;
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unsigned int div_peric5;
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- unsigned char res61[0x10];
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+ unsigned char res74[0x10];
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unsigned int sclk_div_isp;
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- unsigned char res62[0xc];
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+ unsigned char res75[0xc];
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unsigned int div2_ratio0;
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unsigned int div2_ratio1;
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- unsigned char res63[0x8];
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+ unsigned char res76[0x8];
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unsigned int div4_ratio;
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- unsigned char res64[0x6c];
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+ unsigned char res77[0x6c];
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unsigned int div_stat_top0;
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unsigned int div_stat_top1;
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- unsigned char res65[0x8];
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+ unsigned char res78[0x8];
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unsigned int div_stat_gscl;
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- unsigned int div_stat_disp0_0;
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- unsigned int div_stat_disp0_1;
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+ unsigned char res79[0x8];
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unsigned int div_stat_disp1_0;
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- unsigned int div_stat_disp1_1;
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- unsigned char res67[0x8];
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+ unsigned char res80[0xc];
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unsigned int div_stat_gen;
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- unsigned char res68[0x4];
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- unsigned int div_stat_maudio;
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+ unsigned char res81[0x4];
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+ unsigned int div_stat_mau;
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unsigned int div_stat_fsys0;
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unsigned int div_stat_fsys1;
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unsigned int div_stat_fsys2;
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- unsigned int div_stat_fsys3;
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+ unsigned char res82[0x4];
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unsigned int div_stat_peric0;
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unsigned int div_stat_peric1;
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unsigned int div_stat_peric2;
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unsigned int div_stat_peric3;
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unsigned int div_stat_peric4;
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unsigned int div_stat_peric5;
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- unsigned char res69[0x10];
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+ unsigned char res83[0x10];
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unsigned int sclk_div_stat_isp;
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- unsigned char res70[0xc];
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+ unsigned char res84[0xc];
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unsigned int div2_stat0;
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unsigned int div2_stat1;
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- unsigned char res71[0x8];
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+ unsigned char res85[0x8];
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unsigned int div4_stat;
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- unsigned char res72[0x180];
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- unsigned int gate_top_sclk_disp0;
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+ unsigned char res86[0x184];
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unsigned int gate_top_sclk_disp1;
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unsigned int gate_top_sclk_gen;
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- unsigned char res74[0xc];
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+ unsigned char res87[0xc];
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unsigned int gate_top_sclk_mau;
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unsigned int gate_top_sclk_fsys;
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- unsigned char res75[0xc];
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+ unsigned char res88[0xc];
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unsigned int gate_top_sclk_peric;
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- unsigned char res76[0x1c];
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+ unsigned char res89[0x1c];
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unsigned int gate_top_sclk_isp;
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- unsigned char res77[0xac];
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+ unsigned char res90[0xac];
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unsigned int gate_ip_gscl;
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- unsigned int gate_ip_disp0;
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+ unsigned char res91[0x4];
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unsigned int gate_ip_disp1;
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unsigned int gate_ip_mfc;
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unsigned int gate_ip_g3d;
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unsigned int gate_ip_gen;
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- unsigned char res79[0xc];
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+ unsigned char res92[0xc];
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unsigned int gate_ip_fsys;
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- unsigned char res80[0x4];
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- unsigned int gate_ip_gps;
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+ unsigned char res93[0x8];
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unsigned int gate_ip_peric;
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- unsigned char res81[0xc];
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+ unsigned char res94[0xc];
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unsigned int gate_ip_peris;
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- unsigned char res82[0x1c];
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+ unsigned char res95[0x1c];
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unsigned int gate_block;
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- unsigned char res83[0x7c];
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+ unsigned char res96[0x1c];
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+ unsigned int mcuiop_pwr_ctrl;
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+ unsigned char res97[0x5c];
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unsigned int clkout_cmu_top;
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unsigned int clkout_cmu_top_div_stat;
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- unsigned char res84[0x37f8];
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+ unsigned char res98[0x37f8];
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unsigned int src_lex;
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- unsigned char res85[0x2fc];
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+ unsigned char res99[0x1fc];
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+ unsigned int mux_stat_lex;
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+ unsigned char res100[0xfc];
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unsigned int div_lex;
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- unsigned char res86[0xfc];
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+ unsigned char res101[0xfc];
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unsigned int div_stat_lex;
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- unsigned char res87[0x1fc];
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+ unsigned char res102[0x1fc];
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unsigned int gate_ip_lex;
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- unsigned char res88[0x1fc];
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+ unsigned char res103[0x1fc];
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unsigned int clkout_cmu_lex;
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unsigned int clkout_cmu_lex_div_stat;
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- unsigned char res89[0x3af8];
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+ unsigned char res104[0x3af8];
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unsigned int div_r0x;
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- unsigned char res90[0xfc];
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+ unsigned char res105[0xfc];
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unsigned int div_stat_r0x;
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- unsigned char res91[0x1fc];
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+ unsigned char res106[0x1fc];
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unsigned int gate_ip_r0x;
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- unsigned char res92[0x1fc];
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+ unsigned char res107[0x1fc];
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unsigned int clkout_cmu_r0x;
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unsigned int clkout_cmu_r0x_div_stat;
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- unsigned char res94[0x3af8];
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+ unsigned char res108[0x3af8];
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unsigned int div_r1x;
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- unsigned char res95[0xfc];
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+ unsigned char res109[0xfc];
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unsigned int div_stat_r1x;
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- unsigned char res96[0x1fc];
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+ unsigned char res110[0x1fc];
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unsigned int gate_ip_r1x;
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- unsigned char res97[0x1fc];
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+ unsigned char res111[0x1fc];
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unsigned int clkout_cmu_r1x;
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unsigned int clkout_cmu_r1x_div_stat;
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- unsigned char res98[0x3608];
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+ unsigned char res112[0x3608];
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unsigned int bpll_lock;
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- unsigned char res99[0xfc];
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+ unsigned char res113[0xfc];
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unsigned int bpll_con0;
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unsigned int bpll_con1;
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- unsigned char res100[0xe8];
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+ unsigned char res114[0xe8];
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unsigned int src_cdrex;
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- unsigned char res101[0x1fc];
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+ unsigned char res115[0x1fc];
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unsigned int mux_stat_cdrex;
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- unsigned char res102[0xfc];
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+ unsigned char res116[0xfc];
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unsigned int div_cdrex;
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- unsigned int div_cdrex2;
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- unsigned char res103[0xf8];
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+ unsigned char res117[0xfc];
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unsigned int div_stat_cdrex;
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- unsigned char res104[0x2fc];
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+ unsigned char res118[0x2fc];
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unsigned int gate_ip_cdrex;
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- unsigned char res105[0xc];
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- unsigned int c2c_monitor;
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- unsigned int dmc_pwr_ctrl;
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- unsigned char res106[0x4];
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+ unsigned char res119[0x10];
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+ unsigned int dmc_freq_ctrl;
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+ unsigned char res120[0x4];
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unsigned int drex2_pause;
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- unsigned char res107[0xe0];
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+ unsigned char res121[0xe0];
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unsigned int clkout_cmu_cdrex;
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unsigned int clkout_cmu_cdrex_div_stat;
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- unsigned char res108[0x8];
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+ unsigned char res122[0x8];
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unsigned int lpddr3phy_ctrl;
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- unsigned char res109[0xf5f8];
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+ unsigned int lpddr3phy_con0;
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+ unsigned int lpddr3phy_con1;
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+ unsigned int lpddr3phy_con2;
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+ unsigned int lpddr3phy_con3;
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+ unsigned int pll_div2_sel;
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+ unsigned char res123[0xf5d8];
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};
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#endif
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-
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#endif
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Rajeshwari Shinde