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@@ -15,6 +15,7 @@
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#include <net.h>
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#include <malloc.h>
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#include <miiphy.h>
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+#include <wait_bit.h>
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#include <asm/io.h>
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#include <linux/errno.h>
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#include <asm/types.h>
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@@ -40,10 +41,24 @@ DECLARE_GLOBAL_DATA_PTR;
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#define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)->smi)
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#if defined(CONFIG_PHYLIB) || defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
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+static int smi_wait_ready(struct mvgbe_device *dmvgbe)
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+{
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+ int ret;
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+
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+ ret = wait_for_bit_le32(&MVGBE_SMI_REG, MVGBE_PHY_SMI_BUSY_MASK, false,
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+ MVGBE_PHY_SMI_TIMEOUT_MS, false);
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+ if (ret) {
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+ printf("Error: SMI busy timeout\n");
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+ return ret;
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+ }
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+
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+ return 0;
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+}
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+
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/*
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* smi_reg_read - miiphy_read callback function.
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*
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- * Returns 16bit phy register value, or 0xffff on error
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+ * Returns 16bit phy register value, or -EFAULT on error
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*/
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static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad,
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int reg_ofs)
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@@ -74,16 +89,9 @@ static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad,
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return -EFAULT;
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}
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- timeout = MVGBE_PHY_SMI_TIMEOUT;
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/* wait till the SMI is not busy */
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- do {
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- /* read smi register */
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- smi_reg = MVGBE_REG_RD(MVGBE_SMI_REG);
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- if (timeout-- == 0) {
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- printf("Err..(%s) SMI busy timeout\n", __func__);
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- return -EFAULT;
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- }
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- } while (smi_reg & MVGBE_PHY_SMI_BUSY_MASK);
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+ if (smi_wait_ready(dmvgbe) < 0)
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+ return -EFAULT;
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/* fill the phy address and regiser offset and read opcode */
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smi_reg = (phy_adr << MVGBE_PHY_SMI_DEV_ADDR_OFFS)
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@@ -119,10 +127,9 @@ static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad,
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}
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/*
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- * smi_reg_write - imiiphy_write callback function.
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+ * smi_reg_write - miiphy_write callback function.
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*
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- * Returns 0 if write succeed, -EINVAL on bad parameters
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- * -ETIME on timeout
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+ * Returns 0 if write succeed, -EFAULT on error
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*/
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static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad,
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int reg_ofs, u16 data)
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@@ -131,7 +138,6 @@ static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad,
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struct mvgbe_device *dmvgbe = to_mvgbe(dev);
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struct mvgbe_registers *regs = dmvgbe->regs;
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u32 smi_reg;
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- u32 timeout;
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/* Phyadr write request*/
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if (phy_adr == MV_PHY_ADR_REQUEST &&
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@@ -147,19 +153,12 @@ static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad,
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}
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if (reg_ofs > PHYREG_MASK) {
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printf("Err..(%s) Invalid register offset\n", __func__);
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- return -EINVAL;
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+ return -EFAULT;
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}
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/* wait till the SMI is not busy */
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- timeout = MVGBE_PHY_SMI_TIMEOUT;
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- do {
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- /* read smi register */
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- smi_reg = MVGBE_REG_RD(MVGBE_SMI_REG);
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- if (timeout-- == 0) {
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- printf("Err..(%s) SMI busy timeout\n", __func__);
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- return -ETIME;
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- }
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- } while (smi_reg & MVGBE_PHY_SMI_BUSY_MASK);
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+ if (smi_wait_ready(dmvgbe) < 0)
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+ return -EFAULT;
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/* fill the phy addr and reg offset and write opcode and data */
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smi_reg = (data << MVGBE_PHY_SMI_DATA_OFFS);
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