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@@ -2,7 +2,7 @@
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* board/renesas/salvator-x/salvator-x.c
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* This file is Salvator-X board support.
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*
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- * Copyright (C) 2015 Renesas Electronics Corporation
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+ * Copyright (C) 2015-2017 Renesas Electronics Corporation
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* Copyright (C) 2015 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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@@ -22,6 +22,7 @@
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#include <asm/arch/gpio.h>
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#include <asm/arch/rmobile.h>
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#include <asm/arch/rcar-mstp.h>
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+#include <asm/arch/sh_sdhi.h>
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#include <i2c.h>
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#include <mmc.h>
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@@ -48,6 +49,15 @@ void s_init(void)
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#define TMU0_MSTP125 BIT(25) /* secure */
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#define TMU1_MSTP124 BIT(24) /* non-secure */
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#define SCIF2_MSTP310 BIT(10) /* SCIF2 */
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+#define SD0_MSTP314 BIT(14)
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+#define SD1_MSTP313 BIT(13)
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+#define SD2_MSTP312 BIT(12) /* either MMC0 */
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+#define SD3_MSTP311 BIT(11) /* either MMC1 */
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+
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+#define SD0CKCR 0xE6150074
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+#define SD1CKCR 0xE6150078
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+#define SD2CKCR 0xE6150268
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+#define SD3CKCR 0xE615026C
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int board_early_init_f(void)
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{
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@@ -55,6 +65,15 @@ int board_early_init_f(void)
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mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124);
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/* SCIF2 */
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mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SCIF2_MSTP310);
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+ /* eMMC */
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+ mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD1_MSTP313 | SD2_MSTP312);
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+ /* SDHI0, 3 */
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+ mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD0_MSTP314 | SD3_MSTP311);
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+
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+ writel(0, SD0CKCR);
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+ writel(0, SD1CKCR);
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+ writel(0, SD2CKCR);
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+ writel(0, SD3CKCR);
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return 0;
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}
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@@ -83,6 +102,74 @@ int board_init(void)
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return 0;
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}
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+#ifdef CONFIG_SH_SDHI
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+int board_mmc_init(bd_t *bis)
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+{
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+ int ret = -ENODEV;
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+
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+ /* SDHI0 */
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+ gpio_request(GPIO_GFN_SD0_DAT0, NULL);
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+ gpio_request(GPIO_GFN_SD0_DAT1, NULL);
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+ gpio_request(GPIO_GFN_SD0_DAT2, NULL);
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+ gpio_request(GPIO_GFN_SD0_DAT3, NULL);
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+ gpio_request(GPIO_GFN_SD0_CLK, NULL);
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+ gpio_request(GPIO_GFN_SD0_CMD, NULL);
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+ gpio_request(GPIO_GFN_SD0_CD, NULL);
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+ gpio_request(GPIO_GFN_SD0_WP, NULL);
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+
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+ gpio_request(GPIO_GP_5_2, NULL);
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+ gpio_request(GPIO_GP_5_1, NULL);
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+ gpio_direction_output(GPIO_GP_5_2, 1); /* power on */
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+ gpio_direction_output(GPIO_GP_5_1, 1); /* 1: 3.3V, 0: 1.8V */
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+
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+ ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI0_BASE, 0,
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+ SH_SDHI_QUIRK_64BIT_BUF);
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+ if (ret)
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+ return ret;
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+
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+ /* SDHI1/SDHI2 eMMC */
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+ gpio_request(GPIO_GFN_SD1_DAT0, NULL);
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+ gpio_request(GPIO_GFN_SD1_DAT1, NULL);
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+ gpio_request(GPIO_GFN_SD1_DAT2, NULL);
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+ gpio_request(GPIO_GFN_SD1_DAT3, NULL);
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+ gpio_request(GPIO_GFN_SD2_DAT0, NULL);
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+ gpio_request(GPIO_GFN_SD2_DAT1, NULL);
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+ gpio_request(GPIO_GFN_SD2_DAT2, NULL);
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+ gpio_request(GPIO_GFN_SD2_DAT3, NULL);
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+ gpio_request(GPIO_GFN_SD2_CLK, NULL);
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+ gpio_request(GPIO_GFN_SD2_CMD, NULL);
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+ gpio_request(GPIO_GP_5_3, NULL);
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+ gpio_request(GPIO_GP_5_9, NULL);
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+ gpio_direction_output(GPIO_GP_5_3, 0); /* 1: 3.3V, 0: 1.8V */
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+ gpio_direction_output(GPIO_GP_5_9, 0); /* 1: 3.3V, 0: 1.8V */
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+
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+ ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI2_BASE, 1,
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+ SH_SDHI_QUIRK_64BIT_BUF);
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+ if (ret)
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+ return ret;
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+
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+ /* SDHI3 */
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+ gpio_request(GPIO_GFN_SD3_DAT0, NULL); /* GP_4_9 */
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+ gpio_request(GPIO_GFN_SD3_DAT1, NULL); /* GP_4_10 */
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+ gpio_request(GPIO_GFN_SD3_DAT2, NULL); /* GP_4_11 */
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+ gpio_request(GPIO_GFN_SD3_DAT3, NULL); /* GP_4_12 */
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+ gpio_request(GPIO_GFN_SD3_CLK, NULL); /* GP_4_7 */
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+ gpio_request(GPIO_GFN_SD3_CMD, NULL); /* GP_4_8 */
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+ /* IPSR10 */
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+ gpio_request(GPIO_FN_SD3_CD, NULL);
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+ gpio_request(GPIO_FN_SD3_WP, NULL);
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+
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+ gpio_request(GPIO_GP_3_15, NULL);
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+ gpio_request(GPIO_GP_3_14, NULL);
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+ gpio_direction_output(GPIO_GP_3_15, 1); /* power on */
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+ gpio_direction_output(GPIO_GP_3_14, 1); /* 1: 3.3V, 0: 1.8V */
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+
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+ ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI3_BASE, 2,
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+ SH_SDHI_QUIRK_64BIT_BUF);
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+ return ret;
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+}
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+#endif
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+
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int dram_init(void)
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{
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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