x86: braswell: Disable PUNIT power configuration for B0 stepping

FSP's built-in UPD configuration enables PUNIT power configuration,
but on B0 stepping, this causes CPU hangs in fsp_init(). Disable it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

arch/x86/cpu/braswell/fsp_configs.c

@@ -139,6 +139,12 @@ void update_fsp_configs(struct fsp_config_data *config,
 #endif
 	update_fsp_gpio_configs(&silicon_upd->gpio_familiy_ptr,
 				&silicon_upd->gpio_pad_ptr);
+	/*
+	 * For Braswell B0 stepping, disable_punit_pwr_config must be set to 1
+	 * otherwise it just hangs in fsp_init().
+	 */
+	if (gd->arch.x86_mask == 2)
+		silicon_upd->disable_punit_pwr_config = 1;
 	silicon_upd->emmc_mode = fdtdec_get_int(blob, node,
 		"fsp,emmc-mode", EMMC_MODE_PCI);
 	silicon_upd->sata_speed = fdtdec_get_int(blob, node,