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@@ -107,6 +107,38 @@ void disable_cpc_sram(void);
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#define DC_DFWT 0x40000000 /* Data cache is forced write through */
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#define DC_LES 0x20000000 /* Caches are little endian mode */
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+
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+#if !defined(__ASSEMBLY__)
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+static inline uint rd_ic_cst(void)
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+{
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+ return mfspr(IC_CST);
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+}
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+
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+static inline void wr_ic_cst(uint val)
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+{
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+ mtspr(IC_CST, val);
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+}
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+
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+static inline void wr_ic_adr(uint val)
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+{
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+ mtspr(IC_ADR, val);
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+}
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+
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+static inline uint rd_dc_cst(void)
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+{
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+ return mfspr(DC_CST);
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+}
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+
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+static inline void wr_dc_cst(uint val)
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+{
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+ mtspr(DC_CST, val);
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+}
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+
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+static inline void wr_dc_adr(uint val)
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+{
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+ mtspr(DC_ADR, val);
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+}
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+#endif
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#endif /* CONFIG_8xx */
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#endif
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