NAND_MAX_CHIPS has been replaced by CONFIG_SYS_NAND_MAX_CHIPS, and the latter defaults to 1. Signed-off-by: Scott Wood <scottwood@freescale.com>
@@ -128,7 +128,6 @@
/* NAND flash */
#ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_MAX_CHIPS 1
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
@@ -90,7 +90,6 @@
#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
/* socket has two chipselects, nCE0 gated by address BIT(14) */
-#define CONFIG_SYS_NAND_MAX_CHIPS 1
/* SPI support */
#define CONFIG_SPI
@@ -69,7 +69,6 @@
/* U-Boot command configuration */
#include <config_cmd_default.h>
@@ -270,7 +270,6 @@
/* NAND */
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_DBW_8 1
@@ -115,7 +115,6 @@
#define CONFIG_SYS_ALE_MASK 0x8
#undef CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define NAND_MAX_CHIPS 1
#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=davinci_nand.1"
#define MTDPARTS_DEFAULT \
@@ -253,7 +253,6 @@
@@ -231,7 +231,6 @@
#define CONFIG_NAND_MXC
/*
* actually this is nothing someone wants to configure!