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@@ -50,27 +50,10 @@ void board_pci_setup_hose(struct pci_controller *hose)
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int board_pci_post_scan(struct pci_controller *hose)
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{
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int ret = 0;
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- ulong start;
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- pci_dev_t bdf;
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- struct pci_device_id graphic_card[] = { { 0x1234, 0x1111 } };
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u16 device;
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int pam, i;
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-
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- /*
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- * QEMU emulated graphic card shows in the PCI configuration space with
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- * PCI vendor id and device id as an artificial pair 0x1234:0x1111.
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- * It is on PCI bus 0, function 0, but device number is not consistent
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- * for the two x86 targets it supports. For i440FX and PIIX chipset
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- * board, it shows as device 2, while for Q35 and ICH9 chipset board,
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- * it shows as device 1. Here we locate its bdf at run-time based on
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- * its vendor id and device id pair so we can support both boards.
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- */
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- bdf = pci_find_devices(graphic_card, 0);
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- if (bdf != -1) {
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- start = get_timer(0);
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- ret = pci_run_vga_bios(bdf, NULL, PCI_ROM_USE_NATIVE);
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- debug("BIOS ran in %lums\n", get_timer(start));
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- }
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+ pci_dev_t vga;
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+ ulong start;
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/*
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* i440FX and Q35 chipset have different PAM register offset, but with
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@@ -101,5 +84,18 @@ int board_pci_post_scan(struct pci_controller *hose)
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x86_pci_write_config16(PIIX_IDE, IDE1_TIM, IDE_DECODE_EN);
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}
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+ /*
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+ * QEMU emulated graphic card shows in the PCI configuration space with
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+ * PCI vendor id and device id as an artificial pair 0x1234:0x1111.
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+ * It is on PCI bus 0, function 0, but device number is not consistent
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+ * for the two x86 targets it supports. For i440FX and PIIX chipset
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+ * board, it shows as device 2, while for Q35 and ICH9 chipset board,
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+ * it shows as device 1.
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+ */
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+ vga = (device == PCI_DEVICE_ID_INTEL_82441) ? I440FX_VGA : Q35_VGA;
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+ start = get_timer(0);
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+ ret = pci_run_vga_bios(vga, NULL, PCI_ROM_USE_NATIVE);
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+ debug("BIOS ran in %lums\n", get_timer(start));
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+
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return ret;
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}
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