x86: baytrail: fix the GPIOBASE address

The correct GPIOBASE address on the baytrail is 0x48

Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

arch/x86/include/asm/arch-baytrail/gpio.h

@@ -8,6 +8,6 @@
 #define _X86_ARCH_GPIO_H_
 
 /* Where in config space is the register that points to the GPIO registers? */
-#define PCI_CFG_GPIOBASE 0x44
+#define PCI_CFG_GPIOBASE 0x48
 
 #endif /* _X86_ARCH_GPIO_H_ */