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powerpc: mpc85xx: Move macro CONFIG_SYS_PPC64 to Kconfig

Use Kconfig option SYS_PPC64 instead.

Signed-off-by: York Sun <york.sun@nxp.com>
York Sun 8 years ago
parent
7371774ab9
commit
4851278e30
3 changed files with 11 additions and 6 deletions
Unified View Show Diff Stats
  1. 11 0
      arch/powerpc/cpu/mpc85xx/Kconfig
  2. 0 5
      arch/powerpc/include/asm/config_mpc85xx.h
  3. 0 1
      scripts/config_whitelist.txt

+ 11 - 0
arch/powerpc/cpu/mpc85xx/Kconfig
View File 

@@ -348,6 +348,7 @@ config ARCH_B4420
 
 	select SYS_FSL_QORIQ_CHASSIS2
 
 	select SYS_FSL_QORIQ_CHASSIS2
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_COMPAT_4
 
 	select SYS_FSL_SEC_COMPAT_4
 
+	select SYS_PPC64
 
 
 
 config ARCH_B4860
 
 config ARCH_B4860
 
 	bool
 
 	bool
 
@@ -370,6 +371,7 @@ config ARCH_B4860
 
 	select SYS_FSL_QORIQ_CHASSIS2
 
 	select SYS_FSL_QORIQ_CHASSIS2
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_COMPAT_4
 
 	select SYS_FSL_SEC_COMPAT_4
 
+	select SYS_PPC64
 
 
 
 config ARCH_BSC9131
 
 config ARCH_BSC9131
 
 	bool
 
 	bool
 
@@ -727,6 +729,7 @@ config ARCH_P5020
 
 	select SYS_FSL_QORIQ_CHASSIS1
 
 	select SYS_FSL_QORIQ_CHASSIS1
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_COMPAT_4
 
 	select SYS_FSL_SEC_COMPAT_4
 
+	select SYS_PPC64
 
 
 
 config ARCH_P5040
 
 config ARCH_P5040
 
 	bool
 
 	bool
 
@@ -746,6 +749,7 @@ config ARCH_P5040
 
 	select SYS_FSL_QORIQ_CHASSIS1
 
 	select SYS_FSL_QORIQ_CHASSIS1
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_COMPAT_4
 
 	select SYS_FSL_SEC_COMPAT_4
 
+	select SYS_PPC64
 
 
 
 config ARCH_QEMU_E500
 
 config ARCH_QEMU_E500
 
 	bool
 
 	bool
 
@@ -833,6 +837,7 @@ config ARCH_T2080
 
 	select SYS_FSL_QORIQ_CHASSIS2
 
 	select SYS_FSL_QORIQ_CHASSIS2
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_COMPAT_4
 
 	select SYS_FSL_SEC_COMPAT_4
 
+	select SYS_PPC64
 
 
 
 config ARCH_T2081
 
 config ARCH_T2081
 
 	bool
 
 	bool
 
@@ -851,6 +856,7 @@ config ARCH_T2081
 
 	select SYS_FSL_QORIQ_CHASSIS2
 
 	select SYS_FSL_QORIQ_CHASSIS2
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_COMPAT_4
 
 	select SYS_FSL_SEC_COMPAT_4
 
+	select SYS_PPC64
 
 
 
 config ARCH_T4160
 
 config ARCH_T4160
 
 	bool
 
 	bool
 
@@ -870,6 +876,7 @@ config ARCH_T4160
 
 	select SYS_FSL_QORIQ_CHASSIS2
 
 	select SYS_FSL_QORIQ_CHASSIS2
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_COMPAT_4
 
 	select SYS_FSL_SEC_COMPAT_4
 
+	select SYS_PPC64
 
 
 
 config ARCH_T4240
 
 config ARCH_T4240
 
 	bool
 
 	bool
 
@@ -890,6 +897,7 @@ config ARCH_T4240
 
 	select SYS_FSL_QORIQ_CHASSIS2
 
 	select SYS_FSL_QORIQ_CHASSIS2
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_BE
 
 	select SYS_FSL_SEC_COMPAT_4
 
 	select SYS_FSL_SEC_COMPAT_4
 
+	select SYS_PPC64
 
 
 
 config BOOKE
 
 config BOOKE
 
 	bool
 
 	bool
 
@@ -1210,6 +1218,9 @@ config SYS_NUM_TLBCAMS
 
 		Number of TLB CAM entries for Book-E chips. 64 for E500MC,
 
 		Number of TLB CAM entries for Book-E chips. 64 for E500MC,
 
 		16 for other E500 SoCs.
 
 		16 for other E500 SoCs.
 
 
 
+config SYS_PPC64
 
+	bool
 
+
 
 config SYS_PPC_E500_USE_DEBUG_TLB
 
 config SYS_PPC_E500_USE_DEBUG_TLB
 
 	bool
 
 	bool

+ 0 - 5
arch/powerpc/include/asm/config_mpc85xx.h
View File 

@@ -172,7 +172,6 @@
 
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xff000000
 
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xff000000
 
 
 
 #elif defined(CONFIG_ARCH_P5020) /* also supports P5010 */
 
 #elif defined(CONFIG_ARCH_P5020) /* also supports P5010 */
 
-#define CONFIG_SYS_PPC64		/* 64-bit core */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	2
 
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	2
 
 #define CONFIG_SYS_NUM_FMAN		1
 
 #define CONFIG_SYS_NUM_FMAN		1
 
@@ -191,7 +190,6 @@
 
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xc0000000
 
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xc0000000
 
 
 
 #elif defined(CONFIG_ARCH_P5040)
 
 #elif defined(CONFIG_ARCH_P5040)
 
-#define CONFIG_SYS_PPC64
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	3
 
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	3
 
 #define CONFIG_SYS_NUM_FMAN		2
 
 #define CONFIG_SYS_NUM_FMAN		2
 
@@ -233,7 +231,6 @@
 
 #define CONFIG_ESDHC_HC_BLK_ADDR
 
 #define CONFIG_ESDHC_HC_BLK_ADDR
 
 
 
 #elif defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160)
 
 #elif defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160)
 
-#define CONFIG_SYS_PPC64		/* 64-bit core */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 
 #define CONFIG_SYS_FSL_QMAN_V3		/* QMAN version 3 */
 
 #define CONFIG_SYS_FSL_QMAN_V3		/* QMAN version 3 */
 
@@ -277,7 +274,6 @@
 
 #define CONFIG_SYS_FSL_PCI_VER_3_X
 
 #define CONFIG_SYS_FSL_PCI_VER_3_X
 
 
 
 #elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420)
 
 #elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420)
 
-#define CONFIG_SYS_PPC64		/* 64-bit core */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_SYS_FSL_QMAN_V3		/* QMAN version 3 */
 
 #define CONFIG_SYS_FSL_QMAN_V3		/* QMAN version 3 */
 
 #define CONFIG_HETROGENOUS_CLUSTERS     /* DSP/SC3900 core clusters */
 
 #define CONFIG_HETROGENOUS_CLUSTERS     /* DSP/SC3900 core clusters */
 
@@ -388,7 +384,6 @@
 
 #define CONFIG_SYS_FSL_SFP_VER_3_0
 
 #define CONFIG_SYS_FSL_SFP_VER_3_0
 
 
 
 #elif defined(CONFIG_ARCH_T2080) || defined(CONFIG_ARCH_T2081)
 
 #elif defined(CONFIG_ARCH_T2080) || defined(CONFIG_ARCH_T2081)
 
-#define CONFIG_SYS_PPC64		/* 64-bit core */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */
 
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 
 #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	2
 
 #define CONFIG_SYS_FSL_NUM_CC_PLLS	2

+ 0 - 1
scripts/config_whitelist.txt
View File 

@@ -7132,7 +7132,6 @@ CONFIG_SYS_POST_WATCHDOG
 
 CONFIG_SYS_POST_WORD_ADDR
 
 CONFIG_SYS_POST_WORD_ADDR
 
 CONFIG_SYS_POWER_MANAGER
 
 CONFIG_SYS_POWER_MANAGER
 
 CONFIG_SYS_PPC4XX_USB_ADDR
 
 CONFIG_SYS_PPC4XX_USB_ADDR
 
-CONFIG_SYS_PPC64
 
 CONFIG_SYS_PPC_DDR_WIMGE
 
 CONFIG_SYS_PPC_DDR_WIMGE
 
 CONFIG_SYS_PQSPAR
 
 CONFIG_SYS_PQSPAR
 
 CONFIG_SYS_PRELIM_OR_AM
 
 CONFIG_SYS_PRELIM_OR_AM