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@@ -433,6 +433,39 @@ u32 get_board_rev(void)
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return (get_cpu_rev() & ~(0xF << 8)) | rev;
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}
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+static int ar8031_phy_fixup(struct phy_device *phydev)
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+{
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+ unsigned short val;
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+
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+ /* To enable AR8031 ouput a 125MHz clk from CLK_25M */
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+ phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
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+ phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
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+ phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
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+
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+ val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
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+ val &= 0xffe3;
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+ val |= 0x18;
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+ phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
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+
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+ /* introduce tx clock delay */
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+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
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+ val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
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+ val |= 0x0100;
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+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
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+
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+ return 0;
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+}
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+
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+int board_phy_config(struct phy_device *phydev)
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+{
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+ ar8031_phy_fixup(phydev);
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+
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+ if (phydev->drv->config)
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+ phydev->drv->config(phydev);
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+
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+ return 0;
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+}
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+
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#if defined(CONFIG_VIDEO_IPUV3)
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static void disable_lvds(struct display_info_t const *dev)
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{
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