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@@ -52,40 +52,40 @@ struct mcspi {
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/* per-register bitmasks */
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/* per-register bitmasks */
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#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3)
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#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3)
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-#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP (1 << 2)
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-#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE (1 << 0)
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-#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET (1 << 1)
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+#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2)
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+#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE BIT(0)
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+#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET BIT(1)
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-#define OMAP3_MCSPI_SYSSTATUS_RESETDONE (1 << 0)
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+#define OMAP3_MCSPI_SYSSTATUS_RESETDONE BIT(0)
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-#define OMAP3_MCSPI_MODULCTRL_SINGLE (1 << 0)
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-#define OMAP3_MCSPI_MODULCTRL_MS (1 << 2)
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-#define OMAP3_MCSPI_MODULCTRL_STEST (1 << 3)
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+#define OMAP3_MCSPI_MODULCTRL_SINGLE BIT(0)
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+#define OMAP3_MCSPI_MODULCTRL_MS BIT(2)
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+#define OMAP3_MCSPI_MODULCTRL_STEST BIT(3)
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-#define OMAP3_MCSPI_CHCONF_PHA (1 << 0)
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-#define OMAP3_MCSPI_CHCONF_POL (1 << 1)
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+#define OMAP3_MCSPI_CHCONF_PHA BIT(0)
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+#define OMAP3_MCSPI_CHCONF_POL BIT(1)
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#define OMAP3_MCSPI_CHCONF_CLKD_MASK (0x0f << 2)
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#define OMAP3_MCSPI_CHCONF_CLKD_MASK (0x0f << 2)
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-#define OMAP3_MCSPI_CHCONF_EPOL (1 << 6)
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+#define OMAP3_MCSPI_CHCONF_EPOL BIT(6)
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#define OMAP3_MCSPI_CHCONF_WL_MASK (0x1f << 7)
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#define OMAP3_MCSPI_CHCONF_WL_MASK (0x1f << 7)
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#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY (0x01 << 12)
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#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY (0x01 << 12)
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#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY (0x02 << 12)
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#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY (0x02 << 12)
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#define OMAP3_MCSPI_CHCONF_TRM_MASK (0x03 << 12)
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#define OMAP3_MCSPI_CHCONF_TRM_MASK (0x03 << 12)
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-#define OMAP3_MCSPI_CHCONF_DMAW (1 << 14)
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-#define OMAP3_MCSPI_CHCONF_DMAR (1 << 15)
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-#define OMAP3_MCSPI_CHCONF_DPE0 (1 << 16)
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-#define OMAP3_MCSPI_CHCONF_DPE1 (1 << 17)
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-#define OMAP3_MCSPI_CHCONF_IS (1 << 18)
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-#define OMAP3_MCSPI_CHCONF_TURBO (1 << 19)
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-#define OMAP3_MCSPI_CHCONF_FORCE (1 << 20)
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-
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-#define OMAP3_MCSPI_CHSTAT_RXS (1 << 0)
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-#define OMAP3_MCSPI_CHSTAT_TXS (1 << 1)
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-#define OMAP3_MCSPI_CHSTAT_EOT (1 << 2)
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-
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-#define OMAP3_MCSPI_CHCTRL_EN (1 << 0)
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+#define OMAP3_MCSPI_CHCONF_DMAW BIT(14)
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+#define OMAP3_MCSPI_CHCONF_DMAR BIT(15)
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+#define OMAP3_MCSPI_CHCONF_DPE0 BIT(16)
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+#define OMAP3_MCSPI_CHCONF_DPE1 BIT(17)
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+#define OMAP3_MCSPI_CHCONF_IS BIT(18)
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+#define OMAP3_MCSPI_CHCONF_TURBO BIT(19)
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+#define OMAP3_MCSPI_CHCONF_FORCE BIT(20)
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+
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+#define OMAP3_MCSPI_CHSTAT_RXS BIT(0)
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+#define OMAP3_MCSPI_CHSTAT_TXS BIT(1)
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+#define OMAP3_MCSPI_CHSTAT_EOT BIT(2)
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+
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+#define OMAP3_MCSPI_CHCTRL_EN BIT(0)
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#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0)
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#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0)
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-#define OMAP3_MCSPI_WAKEUPENABLE_WKEN (1 << 0)
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+#define OMAP3_MCSPI_WAKEUPENABLE_WKEN BIT(0)
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struct omap3_spi_slave {
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struct omap3_spi_slave {
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struct spi_slave slave;
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struct spi_slave slave;
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