usb: am437x: Add support for am437x xhci USB host

Add the support for the am437x xhci usb host.

The xHCI host on AM437 is connected to a usb2 phy so need to
add support to enable those clocks.

Signed-off-by: Dan Murphy <dmurphy@ti.com>

arch/arm/include/asm/arch-am33xx/hardware_am43xx.h

@@ -51,4 +51,14 @@
 /* RTC base address */
 #define RTC_BASE			0x44E3E000
 
+/* USB Clock Control */
+#define PRM_PER_USB_OTG_SS0_CLKCTRL (CM_PER + 0x260)
+#define PRM_PER_USB_OTG_SS1_CLKCTRL (CM_PER + 0x268)
+#define USBOTGSSX_CLKCTRL_MODULE_EN	(1 << 2)
+#define USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960 (1 << 8)
+
+#define PRM_PER_USBPHYOCP2SCP0_CLKCTRL (CM_PER + 0x5b8)
+#define PRM_PER_USBPHYOCP2SCP1_CLKCTRL (CM_PER + 0x5c0)
+#define USBPHYOCPSCP_MODULE_EN	(1 << 2)
+
 #endif /* __AM43XX_HARDWARE_AM43XX_H */

drivers/usb/phy/omap_usb_phy.c

@@ -207,6 +207,25 @@ void usb_phy_power(int on)
 }
 #endif /* CONFIG_OMAP_USB2PHY2_HOST */
 
+#ifdef CONFIG_AM437X_USB2PHY2_HOST
+static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
+{
+	const u32 usb_otg_ss_clk_val = (USBOTGSSX_CLKCTRL_MODULE_EN |
+				USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960);
+
+	writel(usb_otg_ss_clk_val, PRM_PER_USB_OTG_SS0_CLKCTRL);
+	writel(usb_otg_ss_clk_val, PRM_PER_USB_OTG_SS1_CLKCTRL);
+
+	writel(USBPHYOCPSCP_MODULE_EN, PRM_PER_USBPHYOCP2SCP0_CLKCTRL);
+	writel(USBPHYOCPSCP_MODULE_EN, PRM_PER_USBPHYOCP2SCP1_CLKCTRL);
+}
+
+void usb_phy_power(int on)
+{
+	return;
+}
+#endif /* CONFIG_AM437X_USB2PHY2_HOST */
+
 void omap_reset_usb_phy(struct dwc3 *dwc3_reg)
 {
 	/* Assert USB3 PHY reset */
@@ -231,6 +250,10 @@ void omap_enable_phy(struct omap_xhci *omap)
 	omap_enable_usb2_phy2(omap);
 #endif
 
+#ifdef CONFIG_AM437X_USB2PHY2_HOST
+	am437x_enable_usb2_phy2(omap);
+#endif
+
 #ifdef CONFIG_OMAP_USB3PHY1_HOST
 	omap_enable_usb3_phy(omap);
 	omap_usb3_phy_init(omap->usb3_phy);

include/configs/am43xx_evm.h

@@ -24,6 +24,7 @@
 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
 #define CONFIG_SYS_PROMPT		"U-Boot# "
 #define CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_CACHELINE_SIZE 32
 
 #define CONFIG_OF_LIBFDT
 #define CONFIG_CMD_BOOTZ
@@ -132,4 +133,14 @@
 /* Unsupported features */
 #undef CONFIG_USE_IRQ
 
+#define CONFIG_CMD_USB
+#define CONFIG_USB_HOST
+#define CONFIG_USB_XHCI
+#define CONFIG_USB_XHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
+
+#define CONFIG_OMAP_USB_PHY
+#define CONFIG_AM437X_USB2PHY2_HOST
+
 #endif	/* __CONFIG_AM43XX_EVM_H */

include/linux/usb/xhci-omap.h

@@ -14,6 +14,10 @@
 #define OMAP_XHCI_BASE 0x488d0000
 #define OMAP_OCP1_SCP_BASE 0x4A081000
 #define OMAP_OTG_WRAPPER_BASE 0x488c0000
+#elif defined CONFIG_AM43XX
+#define OMAP_XHCI_BASE 0x483d0000
+#define OMAP_OCP1_SCP_BASE 0x483E8000
+#define OMAP_OTG_WRAPPER_BASE 0x483dc100
 #else
 /* Default to the OMAP5 XHCI defines */
 #define OMAP_XHCI_BASE 0x4a030000