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@@ -1120,10 +1120,7 @@ e1000_swfw_sync_acquire(struct e1000_hw *hw, uint16_t mask)
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if (e1000_get_hw_eeprom_semaphore(hw))
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return -E1000_ERR_SWFW_SYNC;
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- if (hw->mac_type == e1000_igb)
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- swfw_sync = E1000_READ_REG(hw, I210_SW_FW_SYNC);
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- else
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- swfw_sync = E1000_READ_REG(hw, SW_FW_SYNC);
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+ swfw_sync = E1000_READ_REG(hw, SW_FW_SYNC);
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if (!(swfw_sync & (fwmask | swmask)))
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break;
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@@ -4458,6 +4455,7 @@ e1000_phy_hw_reset(struct e1000_hw *hw)
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if (hw->mac_type >= e1000_82571)
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mdelay(10);
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+
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} else {
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/* Read the Extended Device Control Register, assert the PHY_RESET_DIR
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* bit to put the PHY into reset. Then, take it out of reset.
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