mpc8xx: remove ELPT860 board support

This board is still a non-generic board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: The LEOX team <team@leox.org>

arch/powerpc/cpu/mpc8xx/Kconfig

@@ -43,9 +43,6 @@ config TARGET_KUP4K
 config TARGET_KUP4X
 	bool "Support KUP4X"
 
-config TARGET_ELPT860
-	bool "Support ELPT860"
-
 config TARGET_TQM823L
 	bool "Support TQM823L"
 
@@ -84,7 +81,6 @@ config TARGET_TQM885D
 
 endchoice
 
-source "board/LEOX/elpt860/Kconfig"
 source "board/RRvision/Kconfig"
 source "board/cogent/Kconfig"
 source "board/esteem192e/Kconfig"

board/LEOX/elpt860/Kconfig

@@ -1,12 +0,0 @@
-if TARGET_ELPT860
-
-config SYS_BOARD
-	default "elpt860"
-
-config SYS_VENDOR
-	default "LEOX"
-
-config SYS_CONFIG_NAME
-	default "ELPT860"
-
-endif

board/LEOX/elpt860/MAINTAINERS

@@ -1,6 +0,0 @@
-ELPT860 BOARD
-M:	The LEOX team <team@leox.org>
-S:	Maintained
-F:	board/LEOX/elpt860/
-F:	include/configs/ELPT860.h
-F:	configs/ELPT860_defconfig

board/LEOX/elpt860/Makefile

@@ -1,21 +0,0 @@
-#######################################################################
-#
-# Copyright (C) 2000, 2001, 2002, 2003
-# The LEOX team <team@leox.org>, http://www.leox.org
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# LEOX.org is about the development of free hardware and software resources
-#   for system on chip.
-#
-# Description: U-Boot port on the LEOX's ELPT860 CPU board
-# ~~~~~~~~~~~
-#
-#######################################################################
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-#######################################################################
-
-obj-y	= elpt860.o flash.o

board/LEOX/elpt860/README.LEOX

@@ -1,423 +0,0 @@
-=============================================================================
-
-	     U-Boot port on the LEOX's ELPT860 CPU board
-	     -------------------------------------------
-
-LEOX.org is about the development of free hardware and software resources
-	 for system on chip.
-
-For more information, contact The LEOX team <team@leox.org>
-
-References:
-~~~~~~~~~~
-    1) Get the last stable release from denx.de:
-	   o ftp://ftp.denx.de/pub/u-boot/u-boot-0.2.0.tar.bz2
-    2) Get the current CVS snapshot:
-	   o cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login
-	   o cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot
-
-=============================================================================
-
-The ELPT860 CPU board has the following features:
-
-Processor:	- MPC860T @ 50MHz
-		- PowerPC Core
-		- 65 MIPS
-		- Caches: D->4KB, I->4KB
-		- CPM: 4 SCCs, 2 SMCs
-		- Ethernet 10/100
-		- SPI, I2C, PCMCIA, Parallel
-
-CPU board:	- DRAM:   16 MB
-		- FLASH: 512 KB + (2 * 4 MB)
-		- NVRAM: 128 KB
-		- 1 Serial link
-		- 2 Ethernet 10 BaseT Channels
-
-On power-up the processor jumps to the address of 0x02000100
-
-Thus, U-Boot is configured to reside in flash starting at the address of
-0x02001000.  The environment space is located in NVRAM separately from
-U-Boot, at the address of 0x03000000.
-
-=============================================================================
-
-			U-Boot test results
-
-=============================================================================
-
-##################################################
-# Operation on the serial console (SMC1)
-##############################
-
-U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
-
-CPU:   XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
-	 *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
-Board: ### No HW ID - assuming ELPT860
-DRAM:  16 MB
-FLASH: 512 kB
-In:    serial
-Out:   serial
-Err:   serial
-Net:   SCC ETHERNET
-
-Type "run nfsboot" to mount root filesystem over NFS
-
-Hit any key to stop autoboot:  0
-LEOX_elpt860: help
-askenv  - get environment variables from stdin
-base    - print or set address offset
-bdinfo  - print Board Info structure
-bootm   - boot application image from memory
-bootp   - boot image via network using BootP/TFTP protocol
-bootd   - boot default, i.e., run 'bootcmd'
-cmp     - memory compare
-coninfo - print console devices and informations
-cp      - memory copy
-crc32   - checksum calculation
-echo    - echo args to console
-erase   - erase FLASH memory
-flinfo  - print FLASH memory information
-go      - start application at address 'addr'
-help    - print online help
-iminfo  - print header information for application image
-loadb   - load binary file over serial line (kermit mode)
-loads   - load S-Record file over serial line
-loop    - infinite loop on address range
-md      - memory display
-mm      - memory modify (auto-incrementing)
-mtest   - simple RAM test
-mw      - memory write (fill)
-nm      - memory modify (constant address)
-printenv- print environment variables
-protect - enable or disable FLASH write protection
-rarpboot- boot image via network using RARP/TFTP protocol
-reset   - Perform RESET of the CPU
-run     - run commands in an environment variable
-saveenv - save environment variables to persistent storage
-setenv  - set environment variables
-sleep   - delay execution for some time
-source  - run script from memory
-tftpboot- boot image via network using TFTP protocol
-	       and env variables ipaddr and serverip
-version - print monitor version
-?       - alias for 'help'
-
-##################################################
-# Environment Variables (CONFIG_ENV_IS_IN_NVRAM)
-##############################
-
-LEOX_elpt860: printenv
-bootdelay=5
-loads_echo=1
-baudrate=9600
-stdin=serial
-stdout=serial
-stderr=serial
-ethaddr=00:03:ca:00:64:df
-ipaddr=192.168.0.30
-netmask=255.255.255.0
-serverip=192.168.0.1
-nfsserverip=192.168.0.1
-preboot=echo;echo Type "run nfsboot" to mount root filesystem over NFS;echo
-gatewayip=192.168.0.1
-ramargs=setenv bootargs root=/dev/ram rw
-rootargs=setenv rootpath /tftp/${ipaddr}
-nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${nfsserverip}:${rootpath}
-addip=setenv bootargs ${bootargs} ip=${ipaddr}:${nfsserverip}:${gatewayip}:${netmask}:${hostname}:eth0:
-ramboot=tftp 400000 /home/leox/pMulti;run ramargs;bootm
-nfsboot=tftp 400000 /home/leox/uImage;run rootargs;run nfsargs;run addip;bootm
-bootcmd=run ramboot
-clocks_in_mhz=1
-
-Environment size: 730/16380 bytes
-
-##################################################
-# Flash Memory Information
-##############################
-
-LEOX_elpt860: flinfo
-
-Bank # 1: AMD AM29F040   (4 Mbits)
-  Size: 512 KB in 8 Sectors
-  Sector Start Addresses:
-    02000000 (RO) 02010000 (RO) 02020000 (RO) 02030000 (RO) 02040000
-    02050000      02060000      02070000
-
-##################################################
-# Board Information Structure
-##############################
-
-LEOX_elpt860: bdinfo
-memstart    = 0x00000000
-memsize     = 0x01000000
-flashstart  = 0x02000000
-flashsize   = 0x00080000
-flashoffset = 0x00030000
-sramstart   = 0x00000000
-sramsize    = 0x00000000
-immr_base   = 0xFF000000
-bootflags   = 0x00000001
-intfreq     =     50 MHz
-busfreq     =     50 MHz
-ethaddr     = 00:03:ca:00:64:df
-IP addr     = 192.168.0.30
-baudrate    =   9600 bps
-
-##################################################
-# Image Download and run over serial port
-#    hello_world (S-Record image)
-#    ===> 1) Enter "loads" command into U-Boot monitor
-#    ===> 2) From TeraTerm's bar menu, Select 'File/Send file...'
-#            Then select 'hello_world.srec' with the file browser
-##############################
-
-U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
-
-CPU:   XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
-	 *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
-Board: ### No HW ID - assuming ELPT860
-DRAM:  16 MB
-FLASH: 512 kB
-In:    serial
-Out:   serial
-Err:   serial
-Net:   SCC ETHERNET
-
-Type "run nfsboot" to mount root filesystem over NFS
-
-Hit any key to stop autoboot:  0
-LEOX_elpt860: loads
-## Ready for S-Record download ...
-S804040004F3050154000501709905014C000501388D
-## First Load Addr = 0x00040000
-## Last  Load Addr = 0x0005018B
-## Total Size      = 0x0001018C = 65932 Bytes
-## Start Addr      = 0x00040004
-LEOX_elpt860: go 40004 This is a test !!!
-## Starting application at 0x00040004 ...
-Hello World
-argc = 6
-argv[0] = "40004"
-argv[1] = "This"
-argv[2] = "is"
-argv[3] = "a"
-argv[4] = "test"
-argv[5] = "!!!"
-argv[6] = "<NULL>"
-Hit any key to exit ...
-
-## Application terminated, rc = 0x0
-
-##################################################
-# Image download and run over ethernet interface
-#    Linux-2.4.4 (uImage) + Root filesystem mounted over NFS
-##############################
-
-U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
-
-CPU:   XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
-	 *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
-Board: ### No HW ID - assuming ELPT860
-DRAM:  16 MB
-FLASH: 512 kB
-In:    serial
-Out:   serial
-Err:   serial
-Net:   SCC ETHERNET
-
-Type "run nfsboot" to mount root filesystem over NFS
-
-Hit any key to stop autoboot:  0
-LEOX_elpt860: run nfsboot
-ARP broadcast 1
-TFTP from server 192.168.0.1; our IP address is 192.168.0.30
-Filename '/home/leox/uImage'.
-Load address: 0x400000
-Loading: #################################################################
-	 #############################
-done
-Bytes transferred = 477294 (7486e hex)
-## Booting image at 00400000 ...
-   Image Name:   Linux-2.4.4
-   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
-   Data Size:    477230 Bytes = 466 kB = 0 MB
-   Load Address: 00000000
-   Entry Point:  00000000
-   Verifying Checksum ... OK
-   Uncompressing Kernel Image ... OK
-Linux version 2.4.4-rthal5 (leox@p5ak6650) (gcc version 2.95.3 20010315 (release/MontaVista)) #1 Wed Jul 3 10:23:53 CEST 2002
-On node 0 totalpages: 4096
-zone(0): 4096 pages.
-zone(1): 0 pages.
-zone(2): 0 pages.
-Kernel command line: root=/dev/nfs rw nfsroot=192.168.0.1:/tftp/192.168.0.30 ip=192.168.0.30:192.168.0.1:192.168.0.1:255.255.255.0::eth0:
-rtsched version <20010618.1050.24>
-Decrementer Frequency: 3125000
-Warning: real time clock seems stuck!
-Calibrating delay loop... 49.76 BogoMIPS
-Memory: 14720k available (928k kernel code, 384k data, 44k init, 0k highmem)
-Dentry-cache hash table entries: 2048 (order: 2, 16384 bytes)
-Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes)
-Page-cache hash table entries: 4096 (order: 2, 16384 bytes)
-Inode-cache hash table entries: 1024 (order: 1, 8192 bytes)
-POSIX conformance testing by UNIFIX
-Linux NET4.0 for Linux 2.4
-Based upon Swansea University Computer Society NET3.039
-Starting kswapd v1.8
-CPM UART driver version 0.03
-ttyS0 on SMC1 at 0x0280, BRG1
-block: queued sectors max/low 9701kB/3233kB, 64 slots per queue
-RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
-eth0: CPM ENET Version 0.2 on SCC1, 00:03:ca:00:64:df
-NET4: Linux TCP/IP 1.0 for NET4.0
-IP Protocols: ICMP, UDP, TCP
-IP: routing cache hash table of 512 buckets, 4Kbytes
-TCP: Hash tables configured (established 1024 bind 1024)
-NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
-Looking up port of RPC 100003/2 on 192.168.0.1
-Looking up port of RPC 100005/2 on 192.168.0.1
-VFS: Mounted root (nfs filesystem).
-Freeing unused kernel memory: 44k init
-INIT: version 2.78 booting
-		Welcome to DENX Embedded Linux Environment
-		Press 'I' to enter interactive startup.
-Mounting proc filesystem:  [  OK  ]
-Configuring kernel parameters:  [  OK  ]
-Cannot access the Hardware Clock via any known method.
-Use the --debug option to see the details of our search for an access method.
-Setting clock : Wed Dec 31 19:00:11 EST 1969 [  OK  ]
-Activating swap partitions:  [  OK  ]
-Setting hostname 192.168.0.30:  [  OK  ]
-Finding module dependencies:
-[  OK  ]
-Checking filesystems
-Checking all file systems.
-[  OK  ]
-Mounting local filesystems:  [  OK  ]
-Enabling swap space:  [  OK  ]
-INIT: Entering runlevel: 3
-Entering non-interactive startup
-Starting system logger: [  OK  ]
-Starting kernel logger: [  OK  ]
-Starting xinetd: [  OK  ]
-
-192 login: root
-Last login: Wed Dec 31 19:00:41 on ttyS0
-bash-2.04#
-
-##################################################
-# Image download and run over ethernet interface
-#    Linux-2.4.4 + Root filesystem mounted from RAM (pMulti)
-##############################
-
-U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
-
-CPU:   XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
-	 *** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
-Board: ### No HW ID - assuming ELPT860
-DRAM:  16 MB
-FLASH: 512 kB
-In:    serial
-Out:   serial
-Err:   serial
-Net:   SCC ETHERNET
-
-Type "run nfsboot" to mount root filesystem over NFS
-
-Hit any key to stop autoboot:  0
-LEOX_elpt860: run ramboot
-ARP broadcast 1
-TFTP from server 192.168.0.1; our IP address is 192.168.0.30
-Filename '/home/leox/pMulti'.
-Load address: 0x400000
-Loading: #################################################################
-	 #################################################################
-	 #################################################################
-	 #################################################################
-	 #################################################################
-	 ########################################################
-done
-Bytes transferred = 1947816 (1db8a8 hex)
-## Booting image at 00400000 ...
-   Image Name:   linux-2.4.4-2002-03-21 Multiboot
-   Image Type:   PowerPC Linux Multi-File Image (gzip compressed)
-   Data Size:    1947752 Bytes = 1902 kB = 1 MB
-   Load Address: 00000000
-   Entry Point:  00000000
-   Contents:
-   Image 0:   477230 Bytes = 466 kB = 0 MB
-   Image 1:  1470508 Bytes = 1436 kB = 1 MB
-   Verifying Checksum ... OK
-   Uncompressing Multi-File Image ... OK
-   Loading Ramdisk to 00e44000, end 00fab02c ... OK
-Linux version 2.4.4-rthal5 (leox@p5ak6650) (gcc version 2.95.3 20010315 (release/MontaVista)) #1 Wed Jul 3 10:23:53 CEST 2002
-On node 0 totalpages: 4096
-zone(0): 4096 pages.
-zone(1): 0 pages.
-zone(2): 0 pages.
-Kernel command line: root=/dev/ram rw
-rtsched version <20010618.1050.24>
-Decrementer Frequency: 3125000
-Warning: real time clock seems stuck!
-Calibrating delay loop... 49.76 BogoMIPS
-Memory: 13280k available (928k kernel code, 384k data, 44k init, 0k highmem)
-Dentry-cache hash table entries: 2048 (order: 2, 16384 bytes)
-Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes)
-Page-cache hash table entries: 4096 (order: 2, 16384 bytes)
-Inode-cache hash table entries: 1024 (order: 1, 8192 bytes)
-POSIX conformance testing by UNIFIX
-Linux NET4.0 for Linux 2.4
-Based upon Swansea University Computer Society NET3.039
-Starting kswapd v1.8
-CPM UART driver version 0.03
-ttyS0 on SMC1 at 0x0280, BRG1
-block: queued sectors max/low 8741kB/2913kB, 64 slots per queue
-RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
-eth0: CPM ENET Version 0.2 on SCC1, 00:03:ca:00:64:df
-RAMDISK: Compressed image found at block 0
-Freeing initrd memory: 1436k freed
-NET4: Linux TCP/IP 1.0 for NET4.0
-IP Protocols: ICMP, UDP, TCP
-IP: routing cache hash table of 512 buckets, 4Kbytes
-TCP: Hash tables configured (established 1024 bind 1024)
-IP-Config: Incomplete network configuration information.
-NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
-VFS: Mounted root (ext2 filesystem).
-Freeing unused kernel memory: 44k init
-init started:  BusyBox v0.60.2 (2002.07.01-12:06+0000) multi-call Configuring hostname
-Configuring lo...
-Configuring eth0...
-Configuring Gateway...
-
-Please press Enter to activate this console.
-
-ELPT860 login: root
-Password:
-Welcome to Linux-2.4.4 for ELPT CPU board (MPC860T @ 50MHz)
-
-					      a8888b.
-					     d888888b.
-					     8P"YP"Y88
-     _      _                                8|o||o|88
-    | |    |_|                               8'    .88
-    | |     _ ____  _   _  _  _              8`._.' Y8.
-    | |    | |  _ \| | | |\ \/ /            d/      `8b.
-    | |___ | | | | | |_| |/    \          .dP   .     Y8b.
-    |_____||_|_| |_|\____|\_/\_/         d8:'   "   `::88b.
-					d8"           `Y88b
-				       :8P     '       :888
-					8a.    :      _a88P
-				      ._/"Yaa_ :    .| 88P|
-				      \    YP"      `| 8P  `.
-				      /     \._____.d|    .'
-				      `--..__)888888P`._.'
-login[21]: root login  on `ttyS0'
-
-
-
-BusyBox v0.60.3 (2002.07.20-10:39+0000) Built-in shell (ash)
-Enter 'help' for a list of built-in commands.
-
-root@ELPT860:~ #

board/LEOX/elpt860/elpt860.c

@@ -1,336 +0,0 @@
-/*
-**=====================================================================
-**
-** Copyright (C) 2000, 2001, 2002, 2003
-** The LEOX team <team@leox.org>, http://www.leox.org
-**
-** LEOX.org is about the development of free hardware and software resources
-**   for system on chip.
-**
-** Description: U-Boot port on the LEOX's ELPT860 CPU board
-** ~~~~~~~~~~~
-**
-**=====================================================================
-**
- * SPDX-License-Identifier:	GPL-2.0+
-**
-**=====================================================================
-*/
-
-/*
-** Note 1: In this file, you have to provide the following functions:
-** ------
-**              int             board_early_init_f(void)
-**              int             checkboard(void)
-**              phys_size_t     initdram(int board_type)
-** called from 'board_init_f()' into 'common/board.c'
-**
-**              void            reset_phy(void)
-** called from 'board_init_r()' into 'common/board.c'
-*/
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-
-static long int dram_size (long int, long int *, long int);
-
-/* ------------------------------------------------------------------------- */
-
-#define	_NOT_USED_	0xFFFFFFFF
-
-const uint init_sdram_table[] = {
-	/*
-	 * Single Read. (Offset 0 in UPMA RAM)
-	 */
-	0x0FFCCC04, 0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04,
-	0xFFFFFC04,		/* last */
-	/*
-	 * SDRAM Initialization (offset 5 in UPMA RAM)
-	 *
-	 * This is no UPM entry point. The following definition uses
-	 * the remaining space to establish an initialization
-	 * sequence, which is executed by a RUN command.
-	 *
-	 */
-	0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04,	/* last */
-	/*
-	 * Burst Read. (Offset 8 in UPMA RAM)
-	 */
-	0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
-	0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
-	0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04,
-	0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04,	/* last */
-	/*
-	 * Single Write. (Offset 18 in UPMA RAM)
-	 */
-	0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, 0x0FFC3C04,
-	0xFFFFFC04, 0xFFFFFC04, 0x0FFFFC04, 0xFFFFFC04,	/* last */
-	/*
-	 * Burst Write. (Offset 20 in UPMA RAM)
-	 */
-	0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
-	0xFFFFFC04, 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04,
-	0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC34, 0x0FAC0C34,
-	0xFFFFFC05, 0xFFFFFC04, 0x0FFCFC04, 0xFFFFFC05,	/* last */
-};
-
-const uint sdram_table[] = {
-	/*
-	 * Single Read. (Offset 0 in UPMA RAM)
-	 */
-	0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04,
-	0xFF0FFC00,		/* last */
-	/*
-	 * SDRAM Initialization (offset 5 in UPMA RAM)
-	 *
-	 * This is no UPM entry point. The following definition uses
-	 * the remaining space to establish an initialization
-	 * sequence, which is executed by a RUN command.
-	 *
-	 */
-	0x0FFCCC04, 0xFFAFFC05, 0xFFAFFC05,	/* last */
-	/*
-	 * Burst Read. (Offset 8 in UPMA RAM)
-	 */
-	0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04,
-	0xF00FFC00, 0xF00FFC00, 0xF00FFC00, 0xFF0FFC00,
-	0x0FFCCC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04,
-	0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04,	/* last */
-	/*
-	 * Single Write. (Offset 18 in UPMA RAM)
-	 */
-	0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF0C00,
-	0xFF0FFC04, 0x0FFCCC04, 0xFFAFFC05,	/* last */
-	_NOT_USED_,
-	/*
-	 * Burst Write. (Offset 20 in UPMA RAM)
-	 */
-	0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC00, 0x00AF0C00,
-	0xF00FFC00, 0xF00FFC00, 0xF00FFC04, 0x0FFCCC04,
-	0xFFAFFC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04,
-	0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04,	/* last */
-	/*
-	 * Refresh  (Offset 30 in UPMA RAM)
-	 */
-	0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04,
-	0xFFFFFC05, 0xFFFFFC04, 0xFFFFFC05, _NOT_USED_,
-	0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04,	/* last */
-	/*
-	 * Exception. (Offset 3c in UPMA RAM)
-	 */
-	0x0FFFFC34, 0x0FAC0C34, 0xFFFFFC05, 0xFFAFFC04,	/* last */
-};
-
-/* ------------------------------------------------------------------------- */
-
-#define CONFIG_SYS_PC4    0x0800
-
-#define CONFIG_SYS_DS1    CONFIG_SYS_PC4
-
-/*
- * Very early board init code (fpga boot, etc.)
- */
-int board_early_init_f (void)
-{
-	volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
-
-	/*
-	 * Light up the red led on ELPT860 pcb (DS1) (PCDAT)
-	 */
-	immr->im_ioport.iop_pcdat &= ~CONFIG_SYS_DS1;	/* PCDAT (DS1 = 0)                */
-	immr->im_ioport.iop_pcpar &= ~CONFIG_SYS_DS1;	/* PCPAR (0=general purpose I/O)  */
-	immr->im_ioport.iop_pcdir |= CONFIG_SYS_DS1;	/* PCDIR (I/O: 0=input, 1=output) */
-
-	return (0);		/* success */
-}
-
-/*
- * Check Board Identity:
- *
- * Test ELPT860 ID string
- *
- * Return 1 if no second DRAM bank, otherwise returns 0
- */
-
-int checkboard (void)
-{
-	char buf[64];
-	int i = getenv_f("serial#", buf, sizeof(buf));
-
-	if ((i < 0) || strncmp(buf, "ELPT860", 7))
-		printf ("### No HW ID - assuming ELPT860\n");
-
-	return (0);		/* success */
-}
-
-/* ------------------------------------------------------------------------- */
-
-phys_size_t initdram (int board_type)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-	long int size8, size9;
-	long int size_b0 = 0;
-
-	/*
-	 * This sequence initializes SDRAM chips on ELPT860 board
-	 */
-	upmconfig (UPMA, (uint *) init_sdram_table,
-		   sizeof (init_sdram_table) / sizeof (uint));
-
-	memctl->memc_mptpr = 0x0200;
-	memctl->memc_mamr = 0x18002111;
-
-	memctl->memc_mar = 0x00000088;
-	memctl->memc_mcr = 0x80002000;	/* CS1: SDRAM bank 0 */
-
-	upmconfig (UPMA, (uint *) sdram_table,
-		   sizeof (sdram_table) / sizeof (uint));
-
-	/*
-	 * Preliminary prescaler for refresh (depends on number of
-	 * banks): This value is selected for four cycles every 62.4 us
-	 * with two SDRAM banks or four cycles every 31.2 us with one
-	 * bank. It will be adjusted after memory sizing.
-	 */
-	memctl->memc_mptpr = CONFIG_SYS_MPTPR_2BK_8K;
-
-	/*
-	 * The following value is used as an address (i.e. opcode) for
-	 * the LOAD MODE REGISTER COMMAND during SDRAM initialisation. If
-	 * the port size is 32bit the SDRAM does NOT "see" the lower two
-	 * address lines, i.e. mar=0x00000088 -> opcode=0x00000022 for
-	 * MICRON SDRAMs:
-	 * ->    0 00 010 0 010
-	 *       |  |   | |   +- Burst Length = 4
-	 *       |  |   | +----- Burst Type   = Sequential
-	 *       |  |   +------- CAS Latency  = 2
-	 *       |  +----------- Operating Mode = Standard
-	 *       +-------------- Write Burst Mode = Programmed Burst Length
-	 */
-	memctl->memc_mar = 0x00000088;
-
-	/*
-	 * Map controller banks 2 and 3 to the SDRAM banks 2 and 3 at
-	 * preliminary addresses - these have to be modified after the
-	 * SDRAM size has been determined.
-	 */
-	memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
-	memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM;
-
-	memctl->memc_mamr = CONFIG_SYS_MAMR_8COL & (~(MAMR_PTAE));	/* no refresh yet */
-
-	udelay (200);
-
-	/* perform SDRAM initializsation sequence */
-
-	memctl->memc_mcr = 0x80002105;	/* CS1: SDRAM bank 0 */
-	udelay (1);
-	memctl->memc_mcr = 0x80002230;	/* CS1: SDRAM bank 0 - execute twice */
-	udelay (1);
-
-	memctl->memc_mamr |= MAMR_PTAE;	/* enable refresh */
-
-	udelay (1000);
-
-	/*
-	 * Check Bank 0 Memory Size for re-configuration
-	 *
-	 * try 8 column mode
-	 */
-	size8 = dram_size (CONFIG_SYS_MAMR_8COL,
-			   SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE);
-
-	udelay (1000);
-
-	/*
-	 * try 9 column mode
-	 */
-	size9 = dram_size (CONFIG_SYS_MAMR_9COL,
-			   SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE);
-
-	if (size8 < size9) {	/* leave configuration at 9 columns       */
-		size_b0 = size9;
-		/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
-	} else {		/* back to 8 columns                      */
-
-		size_b0 = size8;
-		memctl->memc_mamr = CONFIG_SYS_MAMR_8COL;
-		udelay (500);
-		/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
-	}
-
-	udelay (1000);
-
-	/*
-	 * Adjust refresh rate depending on SDRAM type, both banks
-	 * For types > 128 MBit leave it at the current (fast) rate
-	 */
-	if (size_b0 < 0x02000000) {
-		/* reduce to 15.6 us (62.4 us / quad) */
-		memctl->memc_mptpr = CONFIG_SYS_MPTPR_2BK_4K;
-		udelay (1000);
-	}
-
-	/*
-	 * Final mapping: map bigger bank first
-	 */
-	memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) | CONFIG_SYS_OR_TIMING_SDRAM;
-	memctl->memc_br1 = (CONFIG_SYS_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;
-
-	{
-		unsigned long reg;
-
-		/* adjust refresh rate depending on SDRAM type, one bank */
-		reg = memctl->memc_mptpr;
-		reg >>= 1;	/* reduce to CONFIG_SYS_MPTPR_1BK_8K / _4K */
-		memctl->memc_mptpr = reg;
-	}
-
-	udelay (10000);
-
-	return (size_b0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Check memory range for valid RAM. A simple memory test determines
- * the actually available RAM size between addresses `base' and
- * `base + maxsize'. Some (not all) hardware errors are detected:
- * - short between address lines
- * - short between data lines
- */
-
-static long int
-dram_size (long int mamr_value, long int *base, long int maxsize)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-
-	memctl->memc_mamr = mamr_value;
-
-	return (get_ram_size (base, maxsize));
-}
-
-/* ------------------------------------------------------------------------- */
-
-#define CONFIG_SYS_PA1     0x4000
-#define CONFIG_SYS_PA2     0x2000
-
-#define CONFIG_SYS_LBKs    (CONFIG_SYS_PA2 | CONFIG_SYS_PA1)
-
-void reset_phy (void)
-{
-	volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
-
-	/*
-	 * Ensure LBK LXT901 ethernet 1 & 2 = 0 ... for normal loopback in effect
-	 *                                          and no AUI loopback
-	 */
-	immr->im_ioport.iop_padat &= ~CONFIG_SYS_LBKs;	/* PADAT (LBK eth 1&2 = 0)        */
-	immr->im_ioport.iop_papar &= ~CONFIG_SYS_LBKs;	/* PAPAR (0=general purpose I/O)  */
-	immr->im_ioport.iop_padir |= CONFIG_SYS_LBKs;	/* PADIR (I/O: 0=input, 1=output) */
-}

board/LEOX/elpt860/flash.c

@@ -1,602 +0,0 @@
-/*
-**=====================================================================
-**
-** Copyright (C) 2000, 2001, 2002, 2003
-** The LEOX team <team@leox.org>, http://www.leox.org
-**
-** LEOX.org is about the development of free hardware and software resources
-**   for system on chip.
-**
-** Description: U-Boot port on the LEOX's ELPT860 CPU board
-** ~~~~~~~~~~~
-**
-**=====================================================================
-**
- * SPDX-License-Identifier:	GPL-2.0+
-**
-**=====================================================================
-*/
-
-/*
-** Note 1: In this file, you have to provide the following variable:
-** ------
-**              flash_info_t    flash_info[CONFIG_SYS_MAX_FLASH_BANKS]
-** 'flash_info_t' structure is defined into 'include/flash.h'
-** and defined as extern into 'common/cmd_flash.c'
-**
-** Note 2: In this file, you have to provide the following functions:
-** ------
-**              unsigned long   flash_init(void)
-** called from 'board_init_r()' into 'common/board.c'
-**
-**              void            flash_print_info(flash_info_t *info)
-** called from 'do_flinfo()' into 'common/cmd_flash.c'
-**
-**              int             flash_erase(flash_info_t *info,
-**                                          int           s_first,
-**                                          int           s_last)
-** called from 'do_flerase()' & 'flash_sect_erase()' into 'common/cmd_flash.c'
-**
-**              int             write_buff (flash_info_t *info,
-**                                          uchar        *src,
-**                                          ulong         addr,
-**                                          ulong         cnt)
-** called from 'flash_write()' into 'common/cmd_flash.c'
-*/
-
-#include <common.h>
-#include <mpc8xx.h>
-
-
-#ifndef	CONFIG_ENV_ADDR
-#  define CONFIG_ENV_ADDR	(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
-#endif
-
-flash_info_t	flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Internal Functions
- */
-static void   flash_get_offsets (ulong base, flash_info_t *info);
-static ulong  flash_get_size (volatile unsigned char *addr, flash_info_t *info);
-
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static int write_byte (flash_info_t *info, ulong dest, uchar data);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long
-flash_init (void)
-{
-  volatile immap_t     *immap  = (immap_t *)CONFIG_SYS_IMMR;
-  volatile memctl8xx_t *memctl = &immap->im_memctl;
-  unsigned long         size_b0;
-  int i;
-
-  /* Init: no FLASHes known */
-  for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i)
-    {
-      flash_info[i].flash_id = FLASH_UNKNOWN;
-    }
-
-  /* Static FLASH Bank configuration here - FIXME XXX */
-
-  size_b0 = flash_get_size ((volatile unsigned char *)FLASH_BASE0_PRELIM,
-			    &flash_info[0]);
-
-  if ( flash_info[0].flash_id == FLASH_UNKNOWN )
-    {
-      printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
-	      size_b0, size_b0<<20);
-    }
-
-  /* Remap FLASH according to real size */
-  memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK);
-  memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_PS_8 | BR_V;
-
-  /* Re-do sizing to get full correct info */
-  size_b0 = flash_get_size ((volatile unsigned char *)CONFIG_SYS_FLASH_BASE,
-			    &flash_info[0]);
-
-  flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
-  /* monitor protection ON by default */
-  flash_protect (FLAG_PROTECT_SET,
-		 CONFIG_SYS_MONITOR_BASE,
-		 CONFIG_SYS_MONITOR_BASE + monitor_flash_len-1,
-		 &flash_info[0]);
-#endif
-
-#ifdef	CONFIG_ENV_IS_IN_FLASH
-  /* ENV protection ON by default */
-  flash_protect(FLAG_PROTECT_SET,
-		CONFIG_ENV_ADDR,
-		CONFIG_ENV_ADDR + CONFIG_ENV_SIZE-1,
-		&flash_info[0]);
-#endif
-
-  flash_info[0].size = size_b0;
-
-  return (size_b0);
-}
-
-/*-----------------------------------------------------------------------
- */
-static void
-flash_get_offsets (ulong          base,
-		   flash_info_t  *info)
-{
-  int i;
-
-#define SECTOR_64KB    0x00010000
-
-  /* set up sector start adress table */
-  for (i = 0; i < info->sector_count; i++)
-    {
-      info->start[i] = base + (i * SECTOR_64KB);
-    }
-}
-
-/*-----------------------------------------------------------------------
- */
-void
-flash_print_info (flash_info_t *info)
-{
-  int i;
-
-  if ( info->flash_id == FLASH_UNKNOWN )
-    {
-      printf ("missing or unknown FLASH type\n");
-      return;
-    }
-
-  switch ( info->flash_id & FLASH_VENDMASK )
-    {
-    case FLASH_MAN_AMD:	printf ("AMD ");		break;
-    case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
-    case FLASH_MAN_STM: printf ("STM (Thomson) ");      break;
-    default:		printf ("Unknown Vendor ");	break;
-    }
-
-  switch ( info->flash_id & FLASH_TYPEMASK )
-    {
-    case FLASH_AM040:   printf ("AM29F040   (4 Mbits)\n");
-      break;
-    default:	        printf ("Unknown Chip Type\n");
-      break;
-    }
-
-  printf ("  Size: %ld KB in %d Sectors\n",
-	  info->size >> 10, info->sector_count);
-
-  printf ("  Sector Start Addresses:");
-  for (i=0; i<info->sector_count; ++i)
-    {
-      if ((i % 5) == 0)
-	printf ("\n   ");
-      printf (" %08lX%s",
-	      info->start[i],
-	      info->protect[i] ? " (RO)" : "     "
-	      );
-    }
-  printf ("\n");
-
-  return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong
-flash_get_size (volatile unsigned char *addr,
-		flash_info_t           *info)
-{
-  short i;
-  uchar value;
-  ulong base = (ulong)addr;
-
-  /* Write auto select command: read Manufacturer ID */
-  addr[0x0555] = 0xAA;
-  addr[0x02AA] = 0x55;
-  addr[0x0555] = 0x90;
-
-  value = addr[0];
-
-  switch ( value )
-    {
-      /*    case AMD_MANUFACT: */
-    case 0x01:
-      info->flash_id = FLASH_MAN_AMD;
-      break;
-      /*    case FUJ_MANUFACT: */
-    case 0x04:
-      info->flash_id = FLASH_MAN_FUJ;
-      break;
-      /*    case STM_MANUFACT: */
-    case 0x20:
-      info->flash_id = FLASH_MAN_STM;
-      break;
-
-    default:
-      info->flash_id = FLASH_UNKNOWN;
-      info->sector_count = 0;
-      info->size = 0;
-      return (0);			/* no or unknown flash	*/
-    }
-
-  value = addr[1];			/* device ID		*/
-
-  switch ( value )
-    {
-    case STM_ID_F040B:
-    case AMD_ID_F040B:
-      info->flash_id += FLASH_AM040;    /* 4 Mbits = 512k * 8  */
-      info->sector_count = 8;
-      info->size = 0x00080000;
-      break;
-
-    default:
-      info->flash_id = FLASH_UNKNOWN;
-      return (0);			/* => no or unknown flash */
-    }
-
-  /* set up sector start adress table */
-  for (i = 0; i < info->sector_count; i++)
-    {
-      info->start[i] = base + (i * 0x00010000);
-    }
-
-  /* check for protected sectors */
-  for (i = 0; i < info->sector_count; i++)
-    {
-      /* read sector protection at sector address, (A7 .. A0) = 0x02 */
-      /* D0 = 1 if protected */
-      addr = (volatile unsigned char *)(info->start[i]);
-      info->protect[i] = addr[2] & 1;
-    }
-
-  /*
-   * Prevent writes to uninitialized FLASH.
-   */
-  if ( info->flash_id != FLASH_UNKNOWN )
-    {
-      addr = (volatile unsigned char *)info->start[0];
-
-      *addr = 0xF0;	/* reset bank */
-    }
-
-  return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int
-flash_erase (flash_info_t  *info,
-	     int            s_first,
-	     int            s_last)
-{
-  volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]);
-  int flag, prot, sect, l_sect;
-  ulong start, now, last;
-
-  if ( (s_first < 0) || (s_first > s_last) )
-    {
-      if ( info->flash_id == FLASH_UNKNOWN )
-	{
-	  printf ("- missing\n");
-	}
-      else
-	{
-	  printf ("- no sectors to erase\n");
-	}
-      return ( 1 );
-    }
-
-  if ( (info->flash_id == FLASH_UNKNOWN) ||
-       (info->flash_id > FLASH_AMD_COMP) )
-    {
-      printf ("Can't erase unknown flash type %08lx - aborted\n",
-	      info->flash_id);
-      return ( 1 );
-    }
-
-  prot = 0;
-  for (sect=s_first; sect<=s_last; ++sect)
-    {
-      if ( info->protect[sect] )
-	{
-	  prot++;
-	}
-    }
-
-  if ( prot )
-    {
-      printf ("- Warning: %d protected sectors will not be erased!\n", prot);
-    }
-  else
-    {
-      printf ("\n");
-    }
-
-  l_sect = -1;
-
-  /* Disable interrupts which might cause a timeout here */
-  flag = disable_interrupts();
-
-  addr[0x0555] = 0xAA;
-  addr[0x02AA] = 0x55;
-  addr[0x0555] = 0x80;
-  addr[0x0555] = 0xAA;
-  addr[0x02AA] = 0x55;
-
-  /* Start erase on unprotected sectors */
-  for (sect = s_first; sect<=s_last; sect++)
-    {
-      if (info->protect[sect] == 0)    /* not protected */
-	{
-	  addr = (volatile unsigned char *)(info->start[sect]);
-	  addr[0] = 0x30;
-	  l_sect = sect;
-	}
-    }
-
-  /* re-enable interrupts if necessary */
-  if ( flag )
-    enable_interrupts();
-
-  /* wait at least 80us - let's wait 1 ms */
-  udelay (1000);
-
-  /*
-   * We wait for the last triggered sector
-   */
-  if ( l_sect < 0 )
-    goto DONE;
-
-  start = get_timer (0);
-  last  = start;
-  addr = (volatile unsigned char *)(info->start[l_sect]);
-  while ( (addr[0] & 0x80) != 0x80 )
-    {
-      if ( (now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT )
-	{
-	  printf ("Timeout\n");
-	  return ( 1 );
-	}
-      /* show that we're waiting */
-      if ( (now - last) > 1000 )     /* every second */
-	{
-	  putc ('.');
-	  last = now;
-	}
-    }
-
-DONE:
-  /* reset to read mode */
-  addr = (volatile unsigned char *)info->start[0];
-  addr[0] = 0xF0;	/* reset bank */
-
-  printf (" done\n");
-
-  return ( 0 );
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int
-write_buff (flash_info_t  *info,
-	    uchar         *src,
-	    ulong          addr,
-	    ulong          cnt)
-{
-  ulong cp, wp, data;
-  uchar bdata;
-  int i, l, rc;
-
-  if ( (info->flash_id & FLASH_TYPEMASK) == FLASH_AM040 )
-    {
-      /* Width of the data bus: 8 bits */
-
-      wp = addr;
-
-      while ( cnt )
-	{
-	  bdata = *src++;
-
-	  if ( (rc = write_byte(info, wp, bdata)) != 0 )
-	    {
-	      return (rc);
-	    }
-
-	  ++wp;
-	  --cnt;
-	}
-
-      return ( 0 );
-    }
-  else
-    {
-      /* Width of the data bus: 32 bits */
-
-      wp = (addr & ~3);	/* get lower word aligned address */
-
-      /*
-       * handle unaligned start bytes
-       */
-      if ( (l = addr - wp) != 0 )
-	{
-	  data = 0;
-	  for (i=0, cp=wp; i<l; ++i, ++cp)
-	    {
-	      data = (data << 8) | (*(uchar *)cp);
-	    }
-	  for (; i<4 && cnt>0; ++i)
-	    {
-	      data = (data << 8) | *src++;
-	      --cnt;
-	      ++cp;
-	    }
-	  for (; cnt==0 && i<4; ++i, ++cp)
-	    {
-	      data = (data << 8) | (*(uchar *)cp);
-	    }
-
-	  if ( (rc = write_word(info, wp, data)) != 0 )
-	    {
-	      return (rc);
-	    }
-	  wp += 4;
-	}
-
-      /*
-       * handle word aligned part
-       */
-      while ( cnt >= 4 )
-	{
-	  data = 0;
-	  for (i=0; i<4; ++i)
-	    {
-	      data = (data << 8) | *src++;
-	    }
-	  if ( (rc = write_word(info, wp, data)) != 0 )
-	    {
-	      return (rc);
-	    }
-	  wp  += 4;
-	  cnt -= 4;
-	}
-
-      if ( cnt == 0 )
-	{
-	  return (0);
-	}
-
-      /*
-       * handle unaligned tail bytes
-       */
-      data = 0;
-      for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp)
-	{
-	  data = (data << 8) | *src++;
-	  --cnt;
-	}
-      for (; i<4; ++i, ++cp)
-	{
-	  data = (data << 8) | (*(uchar *)cp);
-	}
-
-      return (write_word(info, wp, data));
-    }
-}
-
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int
-write_word (flash_info_t  *info,
-	    ulong          dest,
-	    ulong          data)
-{
-  vu_long *addr = (vu_long*)(info->start[0]);
-  ulong start;
-  int flag;
-
-  /* Check if Flash is (sufficiently) erased */
-  if ( (*((vu_long *)dest) & data) != data )
-    {
-      return (2);
-    }
-  /* Disable interrupts which might cause a timeout here */
-  flag = disable_interrupts();
-
-  addr[0x0555] = 0x00AA00AA;
-  addr[0x02AA] = 0x00550055;
-  addr[0x0555] = 0x00A000A0;
-
-  *((vu_long *)dest) = data;
-
-  /* re-enable interrupts if necessary */
-  if ( flag )
-    enable_interrupts();
-
-  /* data polling for D7 */
-  start = get_timer (0);
-  while ( (*((vu_long *)dest) & 0x00800080) != (data & 0x00800080) )
-    {
-      if ( get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT )
-	{
-	  return (1);
-	}
-    }
-
-  return (0);
-}
-
-/*-----------------------------------------------------------------------
- * Write a byte to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int
-write_byte (flash_info_t  *info,
-	    ulong          dest,
-	    uchar          data)
-{
-  volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]);
-  ulong  start;
-  int    flag;
-
-  /* Check if Flash is (sufficiently) erased */
-  if ( (*((volatile unsigned char *)dest) & data) != data )
-    {
-      return (2);
-    }
-  /* Disable interrupts which might cause a timeout here */
-  flag = disable_interrupts();
-
-  addr[0x0555] = 0xAA;
-  addr[0x02AA] = 0x55;
-  addr[0x0555] = 0xA0;
-
-  *((volatile unsigned char *)dest) = data;
-
-  /* re-enable interrupts if necessary */
-  if ( flag )
-    enable_interrupts();
-
-  /* data polling for D7 */
-  start = get_timer (0);
-  while ( (*((volatile unsigned char *)dest) & 0x80) != (data & 0x80) )
-    {
-      if ( get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT )
-	{
-	  return (1);
-	}
-    }
-
-  return (0);
-}
-
-/*-----------------------------------------------------------------------
- */

board/LEOX/elpt860/u-boot.lds

@@ -1,103 +0,0 @@
-/*
-**=====================================================================
-**
-** Copyright (C) 2000, 2001, 2002, 2003
-** The LEOX team <team@leox.org>, http://www.leox.org
-**
-** LEOX.org is about the development of free hardware and software resources
-**   for system on chip.
-**
-** Description: U-Boot port on the LEOX's ELPT860 CPU board
-** ~~~~~~~~~~~
-**
-**=====================================================================
-**
- * SPDX-License-Identifier:	GPL-2.0+
-**
-**=====================================================================
-*/
-
-OUTPUT_ARCH(powerpc)
-
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-
-    arch/powerpc/cpu/mpc8xx/start.o	(.text*)
-    arch/powerpc/cpu/mpc8xx/traps.o	(.text*)
-    common/built-in.o			(.text*)
-    arch/powerpc/cpu/mpc8xx/built-in.o	(.text*)
-    board/LEOX/elpt860/built-in.o	(.text*)
-    arch/powerpc/lib/built-in.o		(.text*)
-
-    . = env_offset;
-    common/env_embedded.o		(.text*)
-
-    *(.text*)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
-  }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    _GOT2_TABLE_ = .;
-    KEEP(*(.got2))
-    KEEP(*(.got))
-    PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
-    _FIXUP_TABLE_ = .;
-    KEEP(*(.fixup))
-  }
-  __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data*)
-    *(.sdata*)
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-
-  . = ALIGN(4);
-  .u_boot_list : {
-	KEEP(*(SORT(.u_boot_list*)));
-  }
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.bss*)
-   *(.sbss*)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-  __bss_end = . ;
-  PROVIDE (end = .);
-}

board/LEOX/elpt860/u-boot.lds.debug

@@ -1,126 +0,0 @@
-/*
-**=====================================================================
-**
-** Copyright (C) 2000, 2001, 2002, 2003
-** The LEOX team <team@leox.org>, http://www.leox.org
-**
-** LEOX.org is about the development of free hardware and software resources
-**   for system on chip.
-**
-** Description: U-Boot port on the LEOX's ELPT860 CPU board
-** ~~~~~~~~~~~
-**
-**=====================================================================
-**
- * SPDX-License-Identifier:	GPL-2.0+
-**
-**=====================================================================
-*/
-
-OUTPUT_ARCH(powerpc)
-/* Do we need any of these for elf?
-   __DYNAMIC = 0;    */
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-
-    arch/powerpc/cpu/mpc8xx/start.o		(.text)
-    common/dlmalloc.o		(.text)
-    lib/vsprintf.o	(.text)
-    lib/crc32.o		(.text)
-
-    . = env_offset;
-    common/env_embedded.o	(.text)
-
-    *(.text)
-    *(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.rodata)
-    *(.rodata1)
-    *(.rodata.str1.4)
-    *(.eh_frame)
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x0FFF) & 0xFFFFF000;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    *(.got)
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(4096);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(4096);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss       :
-  {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-  }
-  __bss_end = . ;
-  PROVIDE (end = .);
-}

configs/ELPT860_defconfig

@@ -1,3 +0,0 @@
-CONFIG_PPC=y
-CONFIG_8xx=y
-CONFIG_TARGET_ELPT860=y

doc/README.scrapyard

@@ -12,6 +12,7 @@ The list should be sorted in reverse chronological order.
 
 Board            Arch        CPU            Commit      Removed     Last known maintainer/contact
 =================================================================================================
+ELPT860          powerpc     mpc8xx         -           -           The LEOX team <team@leox.org>
 hmi1001          powerpc     mpc5xxx        -           -
 mucmc52          powerpc     mpc5xxx        -           -           Heiko Schocher <hs@denx.de>
 uc101            powerpc     mpc5xxx        -           -           Heiko Schocher <hs@denx.de>

include/commproc.h

@@ -456,32 +456,6 @@ typedef struct scc_enet {
 #define SICR_ENET_CLKRT	((uint)0x00002c00)
 #endif	/* CONFIG_BSEIP */
 
-/***  ELPT860 *********************************************************/
-
-#ifdef CONFIG_ELPT860
-/* Bits in parallel I/O port registers that have to be set/cleared
- * to configure the pins for SCC1 use.
- */
-#  define PROFF_ENET        PROFF_SCC1
-#  define CPM_CR_ENET       CPM_CR_CH_SCC1
-#  define SCC_ENET          0
-
-#  define PA_ENET_RXD       ((ushort)0x0001)	/* PA 15 */
-#  define PA_ENET_TXD       ((ushort)0x0002)	/* PA 14 */
-#  define PA_ENET_RCLK      ((ushort)0x0100)	/* PA  7 */
-#  define PA_ENET_TCLK      ((ushort)0x0200)	/* PA  6 */
-
-#  define PC_ENET_TENA      ((ushort)0x0001)	/* PC 15 */
-#  define PC_ENET_CLSN      ((ushort)0x0010)	/* PC 11 */
-#  define PC_ENET_RENA      ((ushort)0x0020)	/* PC 10 */
-
-/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK1) to
- * SCC1.  Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
- */
-#  define SICR_ENET_MASK    ((uint)0x000000FF)
-#  define SICR_ENET_CLKRT   ((uint)0x00000025)
-#endif	/* CONFIG_ELPT860 */
-
 /***  ESTEEM 192E  **************************************************/
 #ifdef CONFIG_ESTEEM192E
 /* ESTEEM192E

include/configs/ELPT860.h

@@ -1,374 +0,0 @@
-/*
-**=====================================================================
-**
-** Copyright (C) 2000, 2001, 2002, 2003
-** The LEOX team <team@leox.org>, http://www.leox.org
-**
-** LEOX.org is about the development of free hardware and software resources
-**   for system on chip.
-**
-** Description: U-Boot port on the LEOX's ELPT860 CPU board
-** ~~~~~~~~~~~
-**
-**=====================================================================
-**
- * SPDX-License-Identifier:	GPL-2.0+
-**
-**=====================================================================
-*/
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC860		1	/* It's a MPC860, in fact a 860T CPU */
-#define CONFIG_MPC860T		1
-#define CONFIG_ELPT860		1	/* ...on a LEOX's ELPT860 CPU board */
-
-#define CONFIG_SYS_TEXT_BASE	0x02000000
-
-#define CONFIG_8xx_CONS_SMC1	1	/* Console is on SMC1		    */
-#undef	  CONFIG_8xx_CONS_SMC2
-#undef	  CONFIG_8xx_CONS_NONE
-
-#define CONFIG_CLOCKS_IN_MHZ	1  /* Clock passed to Linux (<2.4.5) in MHz */
-#define CONFIG_8xx_GCLK_FREQ	50000000       /* MPC860T runs at 50MHz */
-
-#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
-
-#define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f	*/
-#define CONFIG_RESET_PHY_R	1	/* Call reset_phy()		*/
-
-/* BOOT arguments */
-#define CONFIG_PREBOOT							   \
-     "echo;"								   \
-     "echo Type \"run nfsboot\" to mount root filesystem over NFS;"	   \
-     "echo"
-
-#undef	  CONFIG_BOOTARGS
-
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-    "ramargs=setenv bootargs root=/dev/ram rw\0"			\
-    "rootargs=setenv rootpath /tftp/${ipaddr}\0"			\
-    "nfsargs=setenv bootargs root=/dev/nfs rw "				\
-	"nfsroot=${serverip}:${rootpath}\0"				\
-    "addip=setenv bootargs ${bootargs} "				\
-	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"		\
-	":${hostname}:eth0:off panic=1\0"				\
-    "ramboot=tftp 400000 /home/paugaml/pMulti;"				\
-	"run ramargs;bootm\0"						\
-    "nfsboot=tftp 400000 /home/paugaml/uImage;"				\
-	"run rootargs;run nfsargs;run addip;bootm\0"			\
-    ""
-#define CONFIG_BOOTCOMMAND	"run ramboot"
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_BOOTFILESIZE
-
-
-#undef	  CONFIG_WATCHDOG		/* watchdog disabled		*/
-#undef	  CONFIG_CAN_DRIVER		/* CAN Driver support disabled	*/
-#undef	  CONFIG_RTC_MPC8xx		/* internal RTC MPC8xx unused	*/
-#define CONFIG_RTC_DS164x	1	/* RTC is a Dallas DS1646	*/
-
-#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
-#undef	  CONFIG_SYS_LOADS_BAUD_CHANGE		/* don't allow baudrate change	*/
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ASKENV
-#define CONFIG_CMD_DATE
-
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			/* undef to save memory		*/
-#define CONFIG_SYS_PROMPT     "LEOX_elpt860: " /* Monitor Command Prompt	*/
-
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size	*/
-#else
-#  define CONFIG_SYS_CBSIZE	 256		/* Console I/O Buffer Size	*/
-#endif
-
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS	  16		/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE	  CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x00400000	/* memtest works on	*/
-#define CONFIG_SYS_MEMTEST_END		0x00C00000	/* 4 ... 12 MB in DRAM	*/
-
-#define CONFIG_SYS_LOAD_ADDR		0x00100000	/* default load address */
-
-/*
- * Environment Variables and Storages
- */
-#define CONFIG_ENV_OVERWRITE	1  /* Allow Overwrite of serial# & ethaddr */
-
-#undef	  CONFIG_ENV_IS_IN_NVRAM	       /* Environment is in NVRAM	*/
-#undef	  CONFIG_ENV_IS_IN_EEPROM	       /* Environment is in I2C EEPROM	*/
-#define CONFIG_ENV_IS_IN_FLASH	1      /* Environment is in FLASH	*/
-
-#define CONFIG_BAUDRATE		9600   /* console baudrate = 9600 bps	*/
-
-#define CONFIG_ETHADDR		00:01:77:00:60:40
-#define CONFIG_IPADDR		192.168.0.30
-#define CONFIG_NETMASK		255.255.255.0
-
-#define CONFIG_SERVERIP		192.168.0.1
-#define CONFIG_GATEWAYIP	192.168.0.1
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-
-/*-----------------------------------------------------------------------
- * Internal Memory Mapped Register
- */
-#define CONFIG_SYS_IMMR		0xFF000000
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_SIZE	0x2F00	/* Size of used area in DPRAM	*/
-#define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_FLASH_BASE		0x02000000
-#define CONFIG_SYS_NVRAM_BASE		0x03000000
-
-#if defined(CONFIG_ENV_IS_IN_FLASH)
-#  if defined(DEBUG)
-#    define CONFIG_SYS_MONITOR_LEN	(320 << 10)  /* Reserve 320 kB for Monitor  */
-#  else
-#    define CONFIG_SYS_MONITOR_LEN	(256 << 10)  /* Reserve 256 kB for Monitor  */
-#  endif
-#else
-#  if defined(DEBUG)
-#    define CONFIG_SYS_MONITOR_LEN	(256 << 10)  /* Reserve 256 kB for Monitor  */
-#  else
-#    define CONFIG_SYS_MONITOR_LEN	(192 << 10)  /* Reserve 192 kB for Monitor  */
-#  endif
-#endif
-
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MALLOC_LEN		(128 << 10)  /* Reserve 128 kB for malloc() */
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)    /* Initial Memory map for Linux */
-
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks	     */
-#define CONFIG_SYS_MAX_FLASH_SECT	8	/* max number of sectors on one chip */
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)   */
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)   */
-
-#if defined(CONFIG_ENV_IS_IN_FLASH)
-#  define CONFIG_ENV_OFFSET	0x10000 /* Offset   of Environment Sector    */
-#  define CONFIG_ENV_SIZE		0x10000 /* Total Size of Environment Sector  */
-#endif
-
-/*-----------------------------------------------------------------------
- * NVRAM organization
- */
-#define CONFIG_SYS_NVRAM_BASE_ADDR	CONFIG_SYS_NVRAM_BASE /* Base address of NVRAM area */
-#define CONFIG_SYS_NVRAM_SIZE		((128*1024)-8) /* clock regs resident in the */
-					       /*   8 top NVRAM locations    */
-
-#if defined(CONFIG_ENV_IS_IN_NVRAM)
-#  define CONFIG_ENV_ADDR		CONFIG_SYS_NVRAM_BASE /* Base address of NVRAM area */
-#  define CONFIG_ENV_SIZE		0x4000	/* Total Size of Environment Sector  */
-#endif
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE	16	/* For all MPC8xx CPUs		     */
-
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	 4	/* log base 2 of the above value     */
-#endif
-
-/*-----------------------------------------------------------------------
- * SYPCR - System Protection Control				11-9
- * SYPCR can only be written once after reset!
- *-----------------------------------------------------------------------
- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
- */
-#if defined(CONFIG_WATCHDOG)
-#  define CONFIG_SYS_SYPCR	(SYPCR_SWTC | SYPCR_BMT	 | SYPCR_BME | SYPCR_SWF | \
-			 SYPCR_SWE  | SYPCR_SWRI | SYPCR_SWP)
-#else
-#  define CONFIG_SYS_SYPCR	(SYPCR_SWTC | SYPCR_BMT	 | SYPCR_BME | SYPCR_SWF | \
-						   SYPCR_SWP)
-#endif
-
-/*-----------------------------------------------------------------------
- * SUMCR - SIU Module Configuration				11-6
- *-----------------------------------------------------------------------
- * PCMCIA config., multi-function pin tri-state
- */
-#define CONFIG_SYS_SIUMCR	(SIUMCR_DBGC11)
-
-/*-----------------------------------------------------------------------
- * TBSCR - Time Base Status and Control				11-26
- *-----------------------------------------------------------------------
- * Clear Reference Interrupt Status, Timebase freezing enabled
- */
-#define CONFIG_SYS_TBSCR	(TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
-
-/*-----------------------------------------------------------------------
- * RTCSC - Real-Time Clock Status and Control Register		11-27
- *-----------------------------------------------------------------------
- * Once-per-Second Interrupt, Alarm Interrupt, RTC freezing enabled, RTC
- *  enabled
- */
-#define CONFIG_SYS_RTCSC	(RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE)
-
-/*-----------------------------------------------------------------------
- * PISCR - Periodic Interrupt Status and Control		11-31
- *-----------------------------------------------------------------------
- * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
- */
-#define CONFIG_SYS_PISCR	(PISCR_PS | PISCR_PITF)
-
-/*-----------------------------------------------------------------------
- * PLPRCR - PLL, Low-Power, and Reset Control Register		15-30
- *-----------------------------------------------------------------------
- * Reset PLL lock status sticky bit, timer expired status bit and timer
- * interrupt status bit - leave PLL multiplication factor unchanged !
- */
-#define CONFIG_SYS_PLPRCR	(PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
-
-/*-----------------------------------------------------------------------
- * SCCR - System Clock and reset Control Register		15-27
- *-----------------------------------------------------------------------
- * Set clock output, timebase and RTC source and divider,
- * power management and some other internal clocks
- */
-#define SCCR_MASK	 SCCR_EBDF11
-#define CONFIG_SYS_SCCR	(SCCR_TBS     | \
-			 SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
-			 SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
-			 SCCR_DFALCD00)
-
-/*-----------------------------------------------------------------------
- * Chip Selects + SDRAM timings + Memory Periodic Timer Prescaler
- *-----------------------------------------------------------------------
- *
- */
-#ifdef DEBUG
-#  define CONFIG_SYS_DER		0xFFE7400F	/* Debug Enable Register */
-#else
-#  define CONFIG_SYS_DER		0
-#endif
-
-/*
- * Init Memory Controller:
- * ~~~~~~~~~~~~~~~~~~~~~~
- *
- * BR0 and OR0 (FLASH)
- */
-
-#define FLASH_BASE0_PRELIM	CONFIG_SYS_FLASH_BASE	/* FLASH bank #0	  */
-
-/* used to re-map FLASH both when starting from SRAM or FLASH:
- * restrict access enough to keep SRAM working (if any)
- * but not too much to meddle with FLASH accesses
- */
-#define CONFIG_SYS_PRELIM_OR_AM	0xFF000000	/* 16 MB between each CSx */
-
-/* FLASH timing: ACS = 11, TRLX = 0, CSNT = 0, SCY = 8, EHTR = 0	  */
-#define CONFIG_SYS_OR_TIMING_FLASH	(OR_ACS_DIV2 | OR_BI | OR_SCY_8_CLK)
-
-#define CONFIG_SYS_OR0_PRELIM	(CONFIG_SYS_PRELIM_OR_AM | CONFIG_SYS_OR_TIMING_FLASH)
-#define CONFIG_SYS_BR0_PRELIM	((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_PS_8 | BR_V )
-
-/*
- * BR1 and OR1 (SDRAM)
- *
- */
-#define SDRAM_BASE1_PRELIM	CONFIG_SYS_SDRAM_BASE	/* SDRAM bank #0	*/
-#define SDRAM_MAX_SIZE		0x02000000	/* 32 MB MAX for CS1	*/
-
-/* SDRAM timing:							*/
-#define CONFIG_SYS_OR_TIMING_SDRAM	0x00000000
-
-#define CONFIG_SYS_OR1_PRELIM	((2 * CONFIG_SYS_PRELIM_OR_AM) | CONFIG_SYS_OR_TIMING_SDRAM )
-#define CONFIG_SYS_BR1_PRELIM	((SDRAM_BASE1_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
-
-/*
- * BR2 and OR2 (NVRAM)
- *
- */
-#define NVRAM_BASE1_PRELIM	CONFIG_SYS_NVRAM_BASE	/* NVRAM bank #0	*/
-#define NVRAM_MAX_SIZE		0x00020000	/* 128 KB MAX for CS2	*/
-
-#define CONFIG_SYS_OR2_PRELIM		0xFFF80160
-#define CONFIG_SYS_BR2_PRELIM	((NVRAM_BASE1_PRELIM & BR_BA_MSK) | BR_PS_8 | BR_V )
-
-/*
- * Memory Periodic Timer Prescaler
- */
-
-/* periodic timer for refresh */
-#define CONFIG_SYS_MAMR_PTA		97     /* start with divider for 100 MHz */
-
-/* refresh rate 15.6 us (= 64 ms / 4K = 62.4 / quad bursts) for <= 128 MBit */
-#define CONFIG_SYS_MPTPR_2BK_4K	MPTPR_PTP_DIV16	  /* setting for 2 banks */
-#define CONFIG_SYS_MPTPR_1BK_4K	MPTPR_PTP_DIV32	  /* setting for 1 bank	 */
-
-/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit	 */
-#define CONFIG_SYS_MPTPR_2BK_8K	MPTPR_PTP_DIV8	  /* setting for 2 banks */
-#define CONFIG_SYS_MPTPR_1BK_8K	MPTPR_PTP_DIV16	  /* setting for 1 bank	 */
-
-/*
- * MAMR settings for SDRAM
- */
-
-/* 8 column SDRAM */
-#define CONFIG_SYS_MAMR_8COL	((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT)  | MAMR_PTAE	    | \
-			 MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
-			 MAMR_RLFA_1X	 | MAMR_WLFA_1X	   | MAMR_TLFA_4X)
-/* 9 column SDRAM */
-#define CONFIG_SYS_MAMR_9COL	((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT)  | MAMR_PTAE	    | \
-			 MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
-			 MAMR_RLFA_1X	 | MAMR_WLFA_1X	   | MAMR_TLFA_4X)
-
-#endif	/* __CONFIG_H */