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arm64: zynqmp: Enable SPD ddr support for zcu102 targets

zcu102 contains DIMM with SPD on it at 0x51 address.
For example:
i2c dev 13
i2c sdram 51

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek 7 anos atrás
pai
commit
343671e483

+ 1 - 0
configs/xilinx_zynqmp_zcu102_rev1_0_defconfig

@@ -35,6 +35,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_TIME=y

+ 1 - 0
configs/xilinx_zynqmp_zcu102_revA_defconfig

@@ -34,6 +34,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_TIME=y

+ 1 - 0
configs/xilinx_zynqmp_zcu102_revB_defconfig

@@ -34,6 +34,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SDRAM=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_TIME=y

+ 3 - 0
include/configs/xilinx_zynqmp_zcu102.h

@@ -39,6 +39,9 @@
 #define CONFIG_ZYNQ_EEPROM_BUS		5
 #define CONFIG_ZYNQ_GEM_EEPROM_ADDR	0x54
 
+#define CONFIG_SPD_EEPROM
+#define CONFIG_DDR_SPD
+
 #include <configs/xilinx_zynqmp.h>
 
 #endif /* __CONFIG_ZYNQMP_ZCU102_H */