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@@ -66,9 +66,6 @@
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#define SH7751_PCI_IO_BASE 0xFE240000
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#define SH7751_PCI_IO_SIZE 0x00040000
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-#define SH7751_CS3_BASE_ADDR 0x0C000000
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-#define SH7751_P2CS3_BASE_ADDR 0xAC000000
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-
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#define SH7751_PCIPAR (vu_long *)0xFE2001C0
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#define SH7751_PCIPDR (vu_long *)0xFE200220
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@@ -153,11 +150,12 @@ int pci_sh7751_init(struct pci_controller *hose)
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/* Set up target memory mappings (for external DMA access) */
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/* Map both P0 and P2 range to Area 3 RAM for ease of use */
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- p4_out((64 - 1) << 20, SH7751_PCILSR0);
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- p4_out(SH7751_CS3_BASE_ADDR, SH7751_PCILAR0);
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+ p4_out(CONFIG_SYS_SDRAM_SIZE - 0x100000, SH7751_PCILSR0);
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+ p4_out(CONFIG_SYS_SDRAM_BASE & 0x1FF00000, SH7751_PCILAR0);
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+ p4_out(CONFIG_SYS_SDRAM_BASE & 0xFFF00000, SH7751_PCICONF5);
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+
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p4_out(0, SH7751_PCILSR1);
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p4_out(0, SH7751_PCILAR1);
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- p4_out(SH7751_CS3_BASE_ADDR, SH7751_PCICONF5);
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p4_out(0xd0000000, SH7751_PCICONF6);
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/* Map memory window to same address on PCI bus */
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