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@@ -0,0 +1,45 @@
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+/*
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+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
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+ *
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+ * SPDX-License-Identifier: GPL-2.0+
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+ */
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+
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+#include <common.h>
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+#include <dm.h>
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+#include <errno.h>
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+#include <reset.h>
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+#include <asm/io.h>
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+#include <asm/arch/clock.h>
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+#include <asm/arch/cru_rk3036.h>
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+#include <asm/arch/hardware.h>
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+#include <linux/err.h>
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+
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+int rk3036_reset_request(struct udevice *dev, enum reset_t type)
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+{
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+ struct rk3036_cru *cru = rockchip_get_cru();
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+
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+ if (IS_ERR(cru))
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+ return PTR_ERR(cru);
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+ switch (type) {
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+ case RESET_WARM:
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+ writel(0xeca8, &cru->cru_glb_srst_snd_value);
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+ break;
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+ case RESET_COLD:
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+ writel(0xfdb9, &cru->cru_glb_srst_fst_value);
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+ break;
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+ default:
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+ return -EPROTONOSUPPORT;
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+ }
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+
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+ return -EINPROGRESS;
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+}
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+
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+static struct reset_ops rk3036_reset = {
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+ .request = rk3036_reset_request,
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+};
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+
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+U_BOOT_DRIVER(reset_rk3036) = {
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+ .name = "rk3036_reset",
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+ .id = UCLASS_RESET,
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+ .ops = &rk3036_reset,
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+};
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