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@@ -0,0 +1,78 @@
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+/*
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+ * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
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+ *
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+ * From coreboot src/arch/x86/wakeup.S
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+ *
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+ * SPDX-License-Identifier: GPL-2.0+
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+ */
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+
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+#include <asm/acpi_s3.h>
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+#include <asm/processor.h>
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+#include <asm/processor-flags.h>
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+
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+#define RELOCATED(x) ((x) - __wakeup + WAKEUP_BASE)
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+
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+#define CODE_SEG (X86_GDT_ENTRY_16BIT_CS * X86_GDT_ENTRY_SIZE)
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+#define DATA_SEG (X86_GDT_ENTRY_16BIT_DS * X86_GDT_ENTRY_SIZE)
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+
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+ .code32
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+ .globl __wakeup
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+__wakeup:
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+ /* First prepare the jmp to the resume vector */
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+ mov 0x4(%esp), %eax /* vector */
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+ /* last 4 bits of linear addr are taken as offset */
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+ andw $0x0f, %ax
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+ movw %ax, (__wakeup_offset)
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+ mov 0x4(%esp), %eax
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+ /* the rest is taken as segment */
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+ shr $4, %eax
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+ movw %ax, (__wakeup_segment)
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+
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+ /* Activate the right segment descriptor real mode */
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+ ljmp $CODE_SEG, $RELOCATED(1f)
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+1:
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+ /* 16 bit code from here on... */
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+ .code16
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+
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+ /*
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+ * Load the segment registers w/ properly configured segment
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+ * descriptors. They will retain these configurations (limits,
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+ * writability, etc.) once protected mode is turned off.
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+ */
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+ mov $DATA_SEG, %ax
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+ mov %ax, %ds
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+ mov %ax, %es
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+ mov %ax, %fs
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+ mov %ax, %gs
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+ mov %ax, %ss
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+
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+ /* Turn off protection */
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+ movl %cr0, %eax
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+ andl $~X86_CR0_PE, %eax
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+ movl %eax, %cr0
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+
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+ /* Now really going into real mode */
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+ ljmp $0, $RELOCATED(1f)
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+1:
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+ movw $0x0, %ax
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+ movw %ax, %ds
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+ movw %ax, %es
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+ movw %ax, %ss
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+ movw %ax, %fs
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+ movw %ax, %gs
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+
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+ /*
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+ * This is a FAR JMP to the OS waking vector.
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+ * The C code changes the address to be correct.
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+ */
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+ .byte 0xea
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+
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+__wakeup_offset = RELOCATED(.)
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+ .word 0x0000
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+
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+__wakeup_segment = RELOCATED(.)
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+ .word 0x0000
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+
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+ .globl __wakeup_size
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+__wakeup_size:
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+ .long . - __wakeup
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