|
@@ -9,6 +9,7 @@
|
|
*/
|
|
*/
|
|
|
|
|
|
#include <common.h>
|
|
#include <common.h>
|
|
|
|
+#include <errno.h>
|
|
#include <malloc.h>
|
|
#include <malloc.h>
|
|
#include <mmc.h>
|
|
#include <mmc.h>
|
|
#include <sdhci.h>
|
|
#include <sdhci.h>
|
|
@@ -479,73 +480,83 @@ static const struct mmc_ops sdhci_ops = {
|
|
.init = sdhci_init,
|
|
.init = sdhci_init,
|
|
};
|
|
};
|
|
|
|
|
|
-int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
|
|
|
|
|
|
+int sdhci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth,
|
|
|
|
+ uint caps, u32 max_clk, u32 min_clk, uint version,
|
|
|
|
+ uint quirks, uint host_caps)
|
|
{
|
|
{
|
|
- unsigned int caps;
|
|
|
|
-
|
|
|
|
- host->cfg.name = host->name;
|
|
|
|
- host->cfg.ops = &sdhci_ops;
|
|
|
|
-
|
|
|
|
- caps = sdhci_readl(host, SDHCI_CAPABILITIES);
|
|
|
|
-#ifdef CONFIG_MMC_SDMA
|
|
|
|
- if (!(caps & SDHCI_CAN_DO_SDMA)) {
|
|
|
|
- printf("%s: Your controller doesn't support SDMA!!\n",
|
|
|
|
- __func__);
|
|
|
|
- return -1;
|
|
|
|
- }
|
|
|
|
|
|
+ cfg->name = name;
|
|
|
|
+#ifndef CONFIG_DM_MMC_OPS
|
|
|
|
+ cfg->ops = &sdhci_ops;
|
|
#endif
|
|
#endif
|
|
-
|
|
|
|
if (max_clk)
|
|
if (max_clk)
|
|
- host->cfg.f_max = max_clk;
|
|
|
|
|
|
+ cfg->f_max = max_clk;
|
|
else {
|
|
else {
|
|
- if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
|
|
|
|
- host->cfg.f_max = (caps & SDHCI_CLOCK_V3_BASE_MASK)
|
|
|
|
- >> SDHCI_CLOCK_BASE_SHIFT;
|
|
|
|
|
|
+ if (version >= SDHCI_SPEC_300)
|
|
|
|
+ cfg->f_max = (caps & SDHCI_CLOCK_V3_BASE_MASK) >>
|
|
|
|
+ SDHCI_CLOCK_BASE_SHIFT;
|
|
else
|
|
else
|
|
- host->cfg.f_max = (caps & SDHCI_CLOCK_BASE_MASK)
|
|
|
|
- >> SDHCI_CLOCK_BASE_SHIFT;
|
|
|
|
- host->cfg.f_max *= 1000000;
|
|
|
|
- }
|
|
|
|
- if (host->cfg.f_max == 0) {
|
|
|
|
- printf("%s: Hardware doesn't specify base clock frequency\n",
|
|
|
|
- __func__);
|
|
|
|
- return -1;
|
|
|
|
|
|
+ cfg->f_max = (caps & SDHCI_CLOCK_BASE_MASK) >>
|
|
|
|
+ SDHCI_CLOCK_BASE_SHIFT;
|
|
|
|
+ cfg->f_max *= 1000000;
|
|
}
|
|
}
|
|
|
|
+ if (cfg->f_max == 0)
|
|
|
|
+ return -EINVAL;
|
|
if (min_clk)
|
|
if (min_clk)
|
|
- host->cfg.f_min = min_clk;
|
|
|
|
|
|
+ cfg->f_min = min_clk;
|
|
else {
|
|
else {
|
|
- if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
|
|
|
|
- host->cfg.f_min = host->cfg.f_max /
|
|
|
|
- SDHCI_MAX_DIV_SPEC_300;
|
|
|
|
|
|
+ if (version >= SDHCI_SPEC_300)
|
|
|
|
+ cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_300;
|
|
else
|
|
else
|
|
- host->cfg.f_min = host->cfg.f_max /
|
|
|
|
- SDHCI_MAX_DIV_SPEC_200;
|
|
|
|
|
|
+ cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_200;
|
|
}
|
|
}
|
|
-
|
|
|
|
- host->cfg.voltages = 0;
|
|
|
|
|
|
+ cfg->voltages = 0;
|
|
if (caps & SDHCI_CAN_VDD_330)
|
|
if (caps & SDHCI_CAN_VDD_330)
|
|
- host->cfg.voltages |= MMC_VDD_32_33 | MMC_VDD_33_34;
|
|
|
|
|
|
+ cfg->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34;
|
|
if (caps & SDHCI_CAN_VDD_300)
|
|
if (caps & SDHCI_CAN_VDD_300)
|
|
- host->cfg.voltages |= MMC_VDD_29_30 | MMC_VDD_30_31;
|
|
|
|
|
|
+ cfg->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31;
|
|
if (caps & SDHCI_CAN_VDD_180)
|
|
if (caps & SDHCI_CAN_VDD_180)
|
|
- host->cfg.voltages |= MMC_VDD_165_195;
|
|
|
|
|
|
+ cfg->voltages |= MMC_VDD_165_195;
|
|
|
|
|
|
- if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
|
|
|
|
- host->cfg.voltages |= host->voltages;
|
|
|
|
-
|
|
|
|
- host->cfg.host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
|
|
|
|
- if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
|
|
|
|
|
|
+ cfg->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
|
|
|
|
+ if (version >= SDHCI_SPEC_300) {
|
|
if (caps & SDHCI_CAN_DO_8BIT)
|
|
if (caps & SDHCI_CAN_DO_8BIT)
|
|
- host->cfg.host_caps |= MMC_MODE_8BIT;
|
|
|
|
|
|
+ cfg->host_caps |= MMC_MODE_8BIT;
|
|
}
|
|
}
|
|
|
|
|
|
- if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)
|
|
|
|
- host->cfg.host_caps &= ~(MMC_MODE_HS | MMC_MODE_HS_52MHz);
|
|
|
|
|
|
+ if (quirks & SDHCI_QUIRK_NO_HISPD_BIT)
|
|
|
|
+ cfg->host_caps &= ~(MMC_MODE_HS | MMC_MODE_HS_52MHz);
|
|
|
|
+
|
|
|
|
+ if (host_caps)
|
|
|
|
+ cfg->host_caps |= host_caps;
|
|
|
|
|
|
- if (host->host_caps)
|
|
|
|
- host->cfg.host_caps |= host->host_caps;
|
|
|
|
|
|
+ cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
|
|
|
|
|
|
- host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
|
|
|
|
|
|
+ return 0;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
|
|
|
|
+{
|
|
|
|
+ unsigned int caps;
|
|
|
|
+
|
|
|
|
+ caps = sdhci_readl(host, SDHCI_CAPABILITIES);
|
|
|
|
+#ifdef CONFIG_MMC_SDMA
|
|
|
|
+ if (!(caps & SDHCI_CAN_DO_SDMA)) {
|
|
|
|
+ printf("%s: Your controller doesn't support SDMA!!\n",
|
|
|
|
+ __func__);
|
|
|
|
+ return -1;
|
|
|
|
+ }
|
|
|
|
+#endif
|
|
|
|
+
|
|
|
|
+ if (sdhci_setup_cfg(&host->cfg, host->name, host->bus_width, caps,
|
|
|
|
+ max_clk, min_clk, SDHCI_GET_VERSION(host),
|
|
|
|
+ host->quirks, host->host_caps)) {
|
|
|
|
+ printf("%s: Hardware doesn't specify base clock frequency\n",
|
|
|
|
+ __func__);
|
|
|
|
+ return -EINVAL;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
|
|
|
|
+ host->cfg.voltages |= host->voltages;
|
|
|
|
|
|
sdhci_reset(host, SDHCI_RESET_ALL);
|
|
sdhci_reset(host, SDHCI_RESET_ALL);
|
|
|
|
|