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@@ -15,7 +15,7 @@
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#include "mxs_init.h"
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-static uint32_t dram_vals[] = {
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+__weak uint32_t mxs_dram_vals[] = {
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/*
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* i.MX28 DDR2 at 200MHz
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*/
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@@ -100,11 +100,11 @@ static void initialize_dram_values(void)
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int i;
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debug("SPL: Setting mx28 board specific SDRAM parameters\n");
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- mxs_adjust_memory_params(dram_vals);
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+ mxs_adjust_memory_params(mxs_dram_vals);
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debug("SPL: Applying SDRAM parameters\n");
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- for (i = 0; i < ARRAY_SIZE(dram_vals); i++)
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- writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
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+ for (i = 0; i < ARRAY_SIZE(mxs_dram_vals); i++)
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+ writel(mxs_dram_vals[i], MXS_DRAM_BASE + (4 * i));
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}
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#else
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static void initialize_dram_values(void)
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@@ -112,7 +112,7 @@ static void initialize_dram_values(void)
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int i;
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debug("SPL: Setting mx23 board specific SDRAM parameters\n");
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- mxs_adjust_memory_params(dram_vals);
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+ mxs_adjust_memory_params(mxs_dram_vals);
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/*
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* HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as
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@@ -124,10 +124,10 @@ static void initialize_dram_values(void)
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* So skip the initialization of these HW_DRAM_CTL registers.
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*/
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debug("SPL: Applying SDRAM parameters\n");
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- for (i = 0; i < ARRAY_SIZE(dram_vals); i++) {
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+ for (i = 0; i < ARRAY_SIZE(mxs_dram_vals); i++) {
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if (i == 8 || i == 27 || i == 28 || i == 35)
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continue;
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- writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
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+ writel(mxs_dram_vals[i], MXS_DRAM_BASE + (4 * i));
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}
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/*
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