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@@ -93,7 +93,7 @@ struct omap_hsmmc_data {
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enum bus_mode mode;
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#endif
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u8 controller_flags;
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-#ifndef CONFIG_OMAP34XX
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+#ifdef CONFIG_MMC_OMAP_HS_ADMA
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struct omap_hsmmc_adma_desc *adma_desc_table;
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uint desc_slot;
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#endif
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@@ -117,7 +117,7 @@ struct omap_mmc_of_data {
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u8 controller_flags;
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};
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-#ifndef CONFIG_OMAP34XX
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+#ifdef CONFIG_MMC_OMAP_HS_ADMA
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struct omap_hsmmc_adma_desc {
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u8 attr;
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u8 reserved;
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@@ -741,7 +741,7 @@ static int omap_hsmmc_init_setup(struct mmc *mmc)
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return -ETIMEDOUT;
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}
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}
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-#ifndef CONFIG_OMAP34XX
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+#ifdef CONFIG_MMC_OMAP_HS_ADMA
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reg_val = readl(&mmc_base->hl_hwinfo);
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if (reg_val & MADMA_EN)
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priv->controller_flags |= OMAP_HSMMC_USE_ADMA;
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@@ -834,7 +834,7 @@ static void mmc_reset_controller_fsm(struct hsmmc *mmc_base, u32 bit)
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}
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}
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-#ifndef CONFIG_OMAP34XX
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+#ifdef CONFIG_MMC_OMAP_HS_ADMA
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static void omap_hsmmc_adma_desc(struct mmc *mmc, char *buf, u16 len, bool end)
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{
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struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
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@@ -1037,7 +1037,7 @@ static int omap_hsmmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
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else
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flags |= (DP_DATA | DDIR_WRITE);
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-#ifndef CONFIG_OMAP34XX
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+#ifdef CONFIG_MMC_OMAP_HS_ADMA
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if ((priv->controller_flags & OMAP_HSMMC_USE_ADMA) &&
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!mmc_is_tuning_cmd(cmd->cmdidx)) {
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omap_hsmmc_prepare_data(mmc, data);
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@@ -1082,7 +1082,7 @@ static int omap_hsmmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
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}
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}
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-#ifndef CONFIG_OMAP34XX
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+#ifdef CONFIG_MMC_OMAP_HS_ADMA
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if ((priv->controller_flags & OMAP_HSMMC_USE_ADMA) && data &&
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!mmc_is_tuning_cmd(cmd->cmdidx)) {
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u32 sz_mb, timeout;
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