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@@ -8,7 +8,6 @@
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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-#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/dma.h>
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#include <asm/mach-imx/hab.h>
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#include <asm/mach-imx/rdc-sema.h>
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@@ -254,30 +253,6 @@ void set_wdog_reset(struct wdog_regs *wdog)
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writew(reg, &wdog->wcr);
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}
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-/*
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- * cfg_val will be used for
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- * Boot_cfg4[7:0]:Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0]
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- * After reset, if GPR10[28] is 1, ROM will copy GPR9[25:0]
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- * to SBMR1, which will determine the boot device.
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- */
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-const struct boot_mode soc_boot_modes[] = {
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- {"ecspi1:0", MAKE_CFGVAL(0x00, 0x60, 0x00, 0x00)},
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- {"ecspi1:1", MAKE_CFGVAL(0x40, 0x62, 0x00, 0x00)},
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- {"ecspi1:2", MAKE_CFGVAL(0x80, 0x64, 0x00, 0x00)},
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- {"ecspi1:3", MAKE_CFGVAL(0xc0, 0x66, 0x00, 0x00)},
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-
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- {"weim", MAKE_CFGVAL(0x00, 0x50, 0x00, 0x00)},
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- {"qspi1", MAKE_CFGVAL(0x10, 0x40, 0x00, 0x00)},
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- /* 4 bit bus width */
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- {"usdhc1", MAKE_CFGVAL(0x10, 0x10, 0x00, 0x00)},
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- {"usdhc2", MAKE_CFGVAL(0x10, 0x14, 0x00, 0x00)},
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- {"usdhc3", MAKE_CFGVAL(0x10, 0x18, 0x00, 0x00)},
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- {"mmc1", MAKE_CFGVAL(0x10, 0x20, 0x00, 0x00)},
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- {"mmc2", MAKE_CFGVAL(0x10, 0x24, 0x00, 0x00)},
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- {"mmc3", MAKE_CFGVAL(0x10, 0x28, 0x00, 0x00)},
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- {NULL, 0},
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-};
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-
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void s_init(void)
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{
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/* clock configuration. */
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