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@@ -23,6 +23,8 @@
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_CLOCKS
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#define CONFIG_CLOCKS
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+#define CONFIG_CRC32_VERIFY
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+
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#define CONFIG_FIT
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#define CONFIG_FIT
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#define CONFIG_OF_LIBFDT
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#define CONFIG_OF_LIBFDT
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#define CONFIG_SYS_BOOTMAPSZ (64 * 1024 * 1024)
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#define CONFIG_SYS_BOOTMAPSZ (64 * 1024 * 1024)
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@@ -296,9 +298,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
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#define CONFIG_SYS_MALLOC_SIMPLE
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#define CONFIG_SYS_MALLOC_SIMPLE
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#endif
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#endif
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-#define CHUNKSZ_CRC32 (1 * 1024) /* FIXME: ewww */
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-#define CONFIG_CRC32_VERIFY
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-
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_WATCHDOG_SUPPORT
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#define CONFIG_SPL_WATCHDOG_SUPPORT
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@@ -332,8 +331,4 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
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*/
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*/
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#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
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#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
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-#ifdef CONFIG_SPL_BUILD
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-#undef CONFIG_PARTITIONS
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-#endif
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-
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#endif /* __CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ */
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#endif /* __CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ */
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