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@@ -160,7 +160,7 @@ static int usb_phy_enable(int index, struct usb_ehci *ehci)
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val |= (USBPHY_CTRL_ENUTMILEVEL2 | USBPHY_CTRL_ENUTMILEVEL3);
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__raw_writel(val, phy_ctrl);
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- return val & USBPHY_CTRL_OTG_ID;
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+ return 0;
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}
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/* Base address for this IP block is 0x02184800 */
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@@ -193,6 +193,28 @@ static void usb_oc_config(int index)
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__raw_writel(val, ctrl);
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}
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+int usb_phy_mode(int port)
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+{
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+ void __iomem *phy_reg;
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+ void __iomem *phy_ctrl;
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+ u32 val;
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+
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+ phy_reg = (void __iomem *)phy_bases[port];
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+ phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL);
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+
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+ val = __raw_readl(phy_ctrl);
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+
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+ if (val & USBPHY_CTRL_OTG_ID)
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+ return USB_INIT_DEVICE;
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+ else
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+ return USB_INIT_HOST;
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+}
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+
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+int __weak board_usb_phy_mode(int port)
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+{
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+ return usb_phy_mode(port);
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+}
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+
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int __weak board_ehci_hcd_init(int port)
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{
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return 0;
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@@ -221,7 +243,8 @@ int ehci_hcd_init(int index, enum usb_init_type init,
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usb_power_config(index);
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usb_oc_config(index);
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usb_internal_phy_clock_gate(index, 1);
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- type = usb_phy_enable(index, ehci) ? USB_INIT_DEVICE : USB_INIT_HOST;
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+ usb_phy_enable(index, ehci);
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+ type = board_usb_phy_mode(index);
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*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
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*hcor = (struct ehci_hcor *)((uint32_t)*hccr +
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