فهرست منبع

ARM: armv7: move CONFIG_ARMV7_PSCI to Kconfig

Add ARCH_SUPPORT_PSCI as a non-configurable option that platforms
can select.  Then, move CONFIG_ARMV7_PSCI, which is automatically
enabled if both ARMV7_NONSEC and ARCH_SUPPORT_PSCI are enabled.

Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada 8 سال پیش
والد
کامیت
217f92bb79

+ 3 - 0
arch/arm/Kconfig

@@ -816,10 +816,13 @@ config TARGET_LS1021AQDS
 	bool "Support ls1021aqds"
 	bool "Support ls1021aqds"
 	select CPU_V7
 	select CPU_V7
 	select SUPPORT_SPL
 	select SUPPORT_SPL
+	select ARCH_SUPPORT_PSCI
+
 config TARGET_LS1021ATWR
 config TARGET_LS1021ATWR
 	bool "Support ls1021atwr"
 	bool "Support ls1021atwr"
 	select CPU_V7
 	select CPU_V7
 	select SUPPORT_SPL
 	select SUPPORT_SPL
+	select ARCH_SUPPORT_PSCI
 
 
 config TARGET_LS1043AQDS
 config TARGET_LS1043AQDS
 	bool "Support ls1043aqds"
 	bool "Support ls1043aqds"

+ 10 - 0
arch/arm/cpu/armv7/Kconfig

@@ -6,6 +6,9 @@ config CPU_V7_HAS_NONSEC
 config CPU_V7_HAS_VIRT
 config CPU_V7_HAS_VIRT
         bool
         bool
 
 
+config ARCH_SUPPORT_PSCI
+        bool
+
 config ARMV7_NONSEC
 config ARMV7_NONSEC
 	bool "Enable support for booting in non-secure mode" if EXPERT
 	bool "Enable support for booting in non-secure mode" if EXPERT
 	depends on CPU_V7_HAS_NONSEC
 	depends on CPU_V7_HAS_NONSEC
@@ -31,6 +34,13 @@ config ARMV7_VIRT
 	---help---
 	---help---
 	Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
 	Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
 
 
+config ARMV7_PSCI
+	bool "Enable PSCI support" if EXPERT
+	depends on ARMV7_NONSEC && ARCH_SUPPORT_PSCI
+	default y
+	help
+	  Say Y here to enable PSCI support.
+
 config ARMV7_LPAE
 config ARMV7_LPAE
 	bool "Use LPAE page table format" if EXPERT
 	bool "Use LPAE page table format" if EXPERT
 	depends on CPU_V7
 	depends on CPU_V7

+ 1 - 0
arch/arm/cpu/armv7/mx7/Kconfig

@@ -5,6 +5,7 @@ config MX7
 	select ROM_UNIFIED_SECTIONS
 	select ROM_UNIFIED_SECTIONS
 	select CPU_V7_HAS_VIRT
 	select CPU_V7_HAS_VIRT
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_NONSEC
+	select ARCH_SUPPORT_PSCI
 	default y
 	default y
 
 
 config MX7D
 config MX7D

+ 1 - 0
arch/arm/mach-tegra/tegra124/Kconfig

@@ -8,6 +8,7 @@ config TARGET_JETSON_TK1
 	bool "NVIDIA Tegra124 Jetson TK1 board"
 	bool "NVIDIA Tegra124 Jetson TK1 board"
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_VIRT
 	select CPU_V7_HAS_VIRT
+	select ARCH_SUPPORT_PSCI
 
 
 config TARGET_CEI_TK1_SOM
 config TARGET_CEI_TK1_SOM
 	bool "Colorado Engineering Inc Tegra124 TK1-som board"
 	bool "Colorado Engineering Inc Tegra124 TK1-som board"

+ 1 - 0
arch/arm/mach-uniphier/Kconfig

@@ -8,6 +8,7 @@ config ARCH_UNIPHIER_32BIT
 	select CPU_V7
 	select CPU_V7
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_NONSEC
 	select ARMV7_NONSEC
 	select ARMV7_NONSEC
+	select ARCH_SUPPORT_PSCI
 
 
 config ARCH_UNIPHIER_64BIT
 config ARCH_UNIPHIER_64BIT
 	bool
 	bool

+ 5 - 0
board/sunxi/Kconfig

@@ -37,6 +37,7 @@ config MACH_SUN6I
 	select CPU_V7
 	select CPU_V7
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_VIRT
 	select CPU_V7_HAS_VIRT
+	select ARCH_SUPPORT_PSCI
 	select SUNXI_GEN_SUN6I
 	select SUNXI_GEN_SUN6I
 	select SUPPORT_SPL
 	select SUPPORT_SPL
 	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
@@ -46,6 +47,7 @@ config MACH_SUN7I
 	select CPU_V7
 	select CPU_V7
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_VIRT
 	select CPU_V7_HAS_VIRT
+	select ARCH_SUPPORT_PSCI
 	select SUNXI_GEN_SUN4I
 	select SUNXI_GEN_SUN4I
 	select SUPPORT_SPL
 	select SUPPORT_SPL
 	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
@@ -55,6 +57,7 @@ config MACH_SUN8I_A23
 	select CPU_V7
 	select CPU_V7
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_VIRT
 	select CPU_V7_HAS_VIRT
+	select ARCH_SUPPORT_PSCI
 	select SUNXI_GEN_SUN6I
 	select SUNXI_GEN_SUN6I
 	select SUPPORT_SPL
 	select SUPPORT_SPL
 	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
@@ -64,6 +67,7 @@ config MACH_SUN8I_A33
 	select CPU_V7
 	select CPU_V7
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_VIRT
 	select CPU_V7_HAS_VIRT
+	select ARCH_SUPPORT_PSCI
 	select SUNXI_GEN_SUN6I
 	select SUNXI_GEN_SUN6I
 	select SUPPORT_SPL
 	select SUPPORT_SPL
 	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
@@ -79,6 +83,7 @@ config MACH_SUN8I_H3
 	select CPU_V7
 	select CPU_V7
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_NONSEC
 	select CPU_V7_HAS_VIRT
 	select CPU_V7_HAS_VIRT
+	select ARCH_SUPPORT_PSCI
 	select SUNXI_GEN_SUN6I
 	select SUNXI_GEN_SUN6I
 	select SUPPORT_SPL
 	select SUPPORT_SPL
 	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT

+ 0 - 1
include/configs/jetson-tk1.h

@@ -60,7 +60,6 @@
 #include "tegra-common-usb-gadget.h"
 #include "tegra-common-usb-gadget.h"
 #include "tegra-common-post.h"
 #include "tegra-common-post.h"
 
 
-#define CONFIG_ARMV7_PSCI			1
 #define CONFIG_ARMV7_PSCI_NR_CPUS		4
 #define CONFIG_ARMV7_PSCI_NR_CPUS		4
 /* Reserve top 1M for secure RAM */
 /* Reserve top 1M for secure RAM */
 #define CONFIG_ARMV7_SECURE_BASE		0xfff00000
 #define CONFIG_ARMV7_SECURE_BASE		0xfff00000

+ 0 - 1
include/configs/ls1021aqds.h

@@ -9,7 +9,6 @@
 
 
 #define CONFIG_LS102XA
 #define CONFIG_LS102XA
 
 
-#define CONFIG_ARMV7_PSCI
 #define CONFIG_ARMV7_PSCI_1_0
 #define CONFIG_ARMV7_PSCI_1_0
 #define CONFIG_ARMV7_PSCI_NR_CPUS	CONFIG_MAX_CPUS
 #define CONFIG_ARMV7_PSCI_NR_CPUS	CONFIG_MAX_CPUS
 
 

+ 0 - 1
include/configs/ls1021atwr.h

@@ -9,7 +9,6 @@
 
 
 #define CONFIG_LS102XA
 #define CONFIG_LS102XA
 
 
-#define CONFIG_ARMV7_PSCI
 #define CONFIG_ARMV7_PSCI_1_0
 #define CONFIG_ARMV7_PSCI_1_0
 #define CONFIG_ARMV7_PSCI_NR_CPUS	CONFIG_MAX_CPUS
 #define CONFIG_ARMV7_PSCI_NR_CPUS	CONFIG_MAX_CPUS
 
 

+ 0 - 1
include/configs/mx7_common.h

@@ -72,7 +72,6 @@
 #define CONFIG_CMD_FUSE
 #define CONFIG_CMD_FUSE
 #define CONFIG_MXC_OCOTP
 #define CONFIG_MXC_OCOTP
 
 
-#define CONFIG_ARMV7_PSCI
 #define CONFIG_ARMV7_PSCI_NR_CPUS	2
 #define CONFIG_ARMV7_PSCI_NR_CPUS	2
 #define CONFIG_ARMV7_SECURE_BASE	0x00900000
 #define CONFIG_ARMV7_SECURE_BASE	0x00900000
 
 

+ 0 - 1
include/configs/sun6i.h

@@ -22,7 +22,6 @@
 
 
 #define CONFIG_SUNXI_USB_PHYS	3
 #define CONFIG_SUNXI_USB_PHYS	3
 
 
-#define CONFIG_ARMV7_PSCI		1
 #define CONFIG_ARMV7_PSCI_NR_CPUS	4
 #define CONFIG_ARMV7_PSCI_NR_CPUS	4
 #define CONFIG_ARMV7_SECURE_BASE	SUNXI_SRAM_B_BASE
 #define CONFIG_ARMV7_SECURE_BASE	SUNXI_SRAM_B_BASE
 #define CONFIG_ARMV7_SECURE_MAX_SIZE    (64 * 1024) /* 64 KB */
 #define CONFIG_ARMV7_SECURE_MAX_SIZE    (64 * 1024) /* 64 KB */

+ 0 - 1
include/configs/sun7i.h

@@ -20,7 +20,6 @@
 
 
 #define CONFIG_SUNXI_USB_PHYS	3
 #define CONFIG_SUNXI_USB_PHYS	3
 
 
-#define CONFIG_ARMV7_PSCI		1
 #define CONFIG_ARMV7_PSCI_NR_CPUS	2
 #define CONFIG_ARMV7_PSCI_NR_CPUS	2
 #define CONFIG_ARMV7_SECURE_BASE	SUNXI_SRAM_B_BASE
 #define CONFIG_ARMV7_SECURE_BASE	SUNXI_SRAM_B_BASE
 #define CONFIG_ARMV7_SECURE_MAX_SIZE	(64 * 1024) /* 64 KB */
 #define CONFIG_ARMV7_SECURE_MAX_SIZE	(64 * 1024) /* 64 KB */

+ 0 - 1
include/configs/sun8i.h

@@ -27,7 +27,6 @@
 #endif
 #endif
 
 
 #ifndef CONFIG_MACH_SUN8I_A83T
 #ifndef CONFIG_MACH_SUN8I_A83T
-#define CONFIG_ARMV7_PSCI		1
 #if defined(CONFIG_MACH_SUN8I_A23)
 #if defined(CONFIG_MACH_SUN8I_A23)
 #define CONFIG_ARMV7_PSCI_NR_CPUS	2
 #define CONFIG_ARMV7_PSCI_NR_CPUS	2
 #elif defined(CONFIG_MACH_SUN8I_A33)
 #elif defined(CONFIG_MACH_SUN8I_A33)

+ 0 - 1
include/configs/uniphier.h

@@ -11,7 +11,6 @@
 #ifndef __CONFIG_UNIPHIER_COMMON_H__
 #ifndef __CONFIG_UNIPHIER_COMMON_H__
 #define __CONFIG_UNIPHIER_COMMON_H__
 #define __CONFIG_UNIPHIER_COMMON_H__
 
 
-#define CONFIG_ARMV7_PSCI
 #define CONFIG_ARMV7_PSCI_1_0
 #define CONFIG_ARMV7_PSCI_1_0
 #define CONFIG_ARMV7_PSCI_NR_CPUS   4
 #define CONFIG_ARMV7_PSCI_NR_CPUS   4