瀏覽代碼

dm: pci: Set up the SDRAM mapping correctly

SDRAM doesn't always start at 0. Adjust the region mapping so that it works
on platforms where SDRAM is somewhere else.

This needs testing on other platforms.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass 9 年之前
父節點
當前提交
2084c5af6d
共有 1 個文件被更改,包括 9 次插入6 次删除
  1. 9 6
      drivers/pci/pci-uclass.c

+ 9 - 6
drivers/pci/pci-uclass.c

@@ -680,8 +680,8 @@ static int decode_regions(struct pci_controller *hose, const void *blob,
 			  int parent_node, int node)
 			  int parent_node, int node)
 {
 {
 	int pci_addr_cells, addr_cells, size_cells;
 	int pci_addr_cells, addr_cells, size_cells;
+	phys_addr_t base = 0, size;
 	int cells_per_record;
 	int cells_per_record;
-	phys_addr_t addr;
 	const u32 *prop;
 	const u32 *prop;
 	int len;
 	int len;
 	int i;
 	int i;
@@ -732,11 +732,14 @@ static int decode_regions(struct pci_controller *hose, const void *blob,
 	}
 	}
 
 
 	/* Add a region for our local memory */
 	/* Add a region for our local memory */
-	addr = gd->ram_size;
-	if (gd->pci_ram_top && gd->pci_ram_top < addr)
-		addr = gd->pci_ram_top;
-	pci_set_region(hose->regions + hose->region_count++, 0, 0, addr,
-		       PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
+	size = gd->ram_size;
+#ifdef CONFIG_SYS_SDRAM_BASE
+	base = CONFIG_SYS_SDRAM_BASE;
+#endif
+	if (gd->pci_ram_top && gd->pci_ram_top < base + size)
+		size = gd->pci_ram_top - base;
+	pci_set_region(hose->regions + hose->region_count++, base, base,
+		       size, PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
 
 
 	return 0;
 	return 0;
 }
 }