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@@ -24,7 +24,6 @@ DECLARE_GLOBAL_DATA_PTR;
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#define TIMEOUT_DRAIN_FIFO 5 /* in ms */
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#define CHIP_DELAY_TIMEOUT 200
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#define NAND_STOP_DELAY 40
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-#define PAGE_CHUNK_SIZE (2048)
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/*
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* Define a buffer size for the initial command that detects the flash device:
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@@ -703,7 +702,7 @@ static void set_command_address(struct pxa3xx_nand_info *info,
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unsigned int page_size, uint16_t column, int page_addr)
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{
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/* small page addr setting */
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- if (page_size < PAGE_CHUNK_SIZE) {
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+ if (page_size < info->chunk_size) {
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info->ndcb1 = ((page_addr & 0xFFFFFF) << 8)
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| (column & 0xFF);
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@@ -813,9 +812,9 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
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* which is either naked-read or last-read according to the
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* state.
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*/
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- if (mtd->writesize == PAGE_CHUNK_SIZE) {
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+ if (mtd->writesize == info->chunk_size) {
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info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8);
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- } else if (mtd->writesize > PAGE_CHUNK_SIZE) {
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+ } else if (mtd->writesize > info->chunk_size) {
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info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8)
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| NDCB0_LEN_OVRD
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| NDCB0_EXT_CMD_TYPE(ext_cmd_type);
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@@ -835,7 +834,7 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
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* Multiple page programming needs to execute the initial
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* SEQIN command that sets the page address.
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*/
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- if (mtd->writesize > PAGE_CHUNK_SIZE) {
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+ if (mtd->writesize > info->chunk_size) {
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info->ndcb0 |= NDCB0_CMD_TYPE(0x1)
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| NDCB0_EXT_CMD_TYPE(ext_cmd_type)
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| addr_cycle
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@@ -860,7 +859,7 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
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}
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/* Second command setting for large pages */
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- if (mtd->writesize > PAGE_CHUNK_SIZE) {
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+ if (mtd->writesize > info->chunk_size) {
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/*
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* Multiple page write uses the 'extended command'
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* field. This can be used to issue a command dispatch
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@@ -1286,7 +1285,6 @@ static int pxa3xx_nand_config_ident(struct pxa3xx_nand_info *info)
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struct pxa3xx_nand_platform_data *pdata = info->pdata;
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/* Configure default flash values */
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- info->chunk_size = PAGE_CHUNK_SIZE;
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info->reg_ndcr = 0x0; /* enable all interrupts */
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info->reg_ndcr |= (pdata->enable_arbiter) ? NDCR_ND_ARB_EN : 0;
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info->reg_ndcr |= NDCR_RD_ID_CNT(READ_ID_BYTES);
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@@ -1503,21 +1501,6 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
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chip->bbt_md = &bbt_mirror_descr;
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#endif
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- /*
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- * If the page size is bigger than the FIFO size, let's check
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- * we are given the right variant and then switch to the extended
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- * (aka splitted) command handling,
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- */
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- if (mtd->writesize > PAGE_CHUNK_SIZE) {
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- if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370) {
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- chip->cmdfunc = nand_cmdfunc_extended;
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- } else {
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- dev_err(&info->pdev->dev,
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- "unsupported page size on this variant\n");
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- return -ENODEV;
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- }
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- }
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-
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if (pdata->ecc_strength && pdata->ecc_step_size) {
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ecc_strength = pdata->ecc_strength;
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ecc_step = pdata->ecc_step_size;
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@@ -1537,6 +1520,21 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
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if (ret)
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return ret;
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+ /*
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+ * If the page size is bigger than the FIFO size, let's check
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+ * we are given the right variant and then switch to the extended
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+ * (aka split) command handling,
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+ */
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+ if (mtd->writesize > info->chunk_size) {
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+ if (info->variant == PXA3XX_NAND_VARIANT_ARMADA370) {
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+ chip->cmdfunc = nand_cmdfunc_extended;
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+ } else {
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+ dev_err(&info->pdev->dev,
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+ "unsupported page size on this variant\n");
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+ return -ENODEV;
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+ }
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+ }
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+
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/* calculate addressing information */
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if (mtd->writesize >= 2048)
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host->col_addr_cycles = 2;
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