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@@ -30,10 +30,6 @@
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#define SPI_RX_DUAL BIT(12) /* receive with 2 wires */
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#define SPI_RX_DUAL BIT(12) /* receive with 2 wires */
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#define SPI_RX_QUAD BIT(13) /* receive with 4 wires */
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#define SPI_RX_QUAD BIT(13) /* receive with 4 wires */
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-/* SPI bus connection options - see enum spi_dual_flash */
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-#define SPI_CONN_DUAL_SHARED (1 << 0)
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-#define SPI_CONN_DUAL_SEPARATED (1 << 1)
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-
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/* Header byte that marks the start of the message */
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/* Header byte that marks the start of the message */
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#define SPI_PREAMBLE_END_BYTE 0xec
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#define SPI_PREAMBLE_END_BYTE 0xec
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@@ -93,7 +89,6 @@ struct dm_spi_slave_platdata {
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* @max_write_size: If non-zero, the maximum number of bytes which can
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* @max_write_size: If non-zero, the maximum number of bytes which can
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* be written at once, excluding command bytes.
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* be written at once, excluding command bytes.
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* @memory_map: Address of read-only SPI flash access.
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* @memory_map: Address of read-only SPI flash access.
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- * @option: Varies SPI bus options - separate, shared bus.
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* @flags: Indication of SPI flags.
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* @flags: Indication of SPI flags.
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*/
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*/
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struct spi_slave {
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struct spi_slave {
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@@ -117,7 +112,6 @@ struct spi_slave {
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#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
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#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
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#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */
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#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */
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#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */
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#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */
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-#define SPI_XFER_U_PAGE BIT(4)
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};
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};
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/**
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/**
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