strider: Support con-dp flavor

There is a new strider console flavor with DisplayPort
video.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Reviewed-by: Tom Rini <trini@konsulko.com>

board/gdsys/common/Makefile

@@ -16,3 +16,4 @@ obj-$(CONFIG_HRCON) += osd.o mclink.o dp501.o phy.o ioep-fpga.o fanctrl.o
 obj-$(CONFIG_STRIDER) += mclink.o dp501.o phy.o ioep-fpga.o adv7611.o ch7301.o
 obj-$(CONFIG_STRIDER) += fanctrl.o
 obj-$(CONFIG_STRIDER_CON) += osd.o
+obj-$(CONFIG_STRIDER_CON_DP) += osd.o

board/gdsys/mpc8308/strider.c

@@ -133,6 +133,9 @@ int last_stage_init(void)
 	unsigned char mclink_controllers_dp[] = { 0x24, 0x25, 0x26 };
 #endif
 	bool hw_type_cat = pca9698_get_value(0x20, 18);
+#ifdef CONFIG_STRIDER_CON_DP
+	bool is_dh = pca9698_get_value(0x20, 25);
+#endif
 	bool ch0_sgmii2_present = false;
 
 	/* Turn on Analog Devices ADV7611 */
@@ -140,6 +143,7 @@ int last_stage_init(void)
 
 	/* Turn on Parade DP501 */
 	pca9698_direction_output(0x20, 10, 1);
+	pca9698_direction_output(0x20, 11, 1);
 
 	ch0_sgmii2_present = !pca9698_get_value(0x20, 37);
 
@@ -202,6 +206,14 @@ int last_stage_init(void)
 		osd_probe(0);
 #endif
 
+#ifdef CONFIG_STRIDER_CON_DP
+	if (ioep_fpga_has_osd(0)) {
+		osd_probe(0);
+		if (is_dh)
+			osd_probe(4);
+	}
+#endif
+
 #ifdef CONFIG_STRIDER_CPU
 	ch7301_probe(0, false);
 	dp501_probe(0, false);
@@ -226,6 +238,13 @@ int last_stage_init(void)
 		if (ioep_fpga_has_osd(k))
 			osd_probe(k);
 #endif
+#ifdef CONFIG_STRIDER_CON_DP
+		if (ioep_fpga_has_osd(k)) {
+			osd_probe(k);
+			if (is_dh)
+				osd_probe(k + 4);
+		}
+#endif
 #ifdef CONFIG_STRIDER_CPU
 		if (!adv7611_probe(k))
 			printf("       Advantiv ADV7611 HDMI Receiver\n");
@@ -270,6 +289,24 @@ int fpga_gpio_get(unsigned int bus, int pin)
 	return val & pin;
 }
 
+#ifdef CONFIG_STRIDER_CON_DP
+void fpga_control_set(unsigned int bus, int pin)
+{
+	u16 val;
+
+	FPGA_GET_REG(bus, control, &val);
+	FPGA_SET_REG(bus, control, val | pin);
+}
+
+void fpga_control_clear(unsigned int bus, int pin)
+{
+	u16 val;
+
+	FPGA_GET_REG(bus, control, &val);
+	FPGA_SET_REG(bus, control, val & ~pin);
+}
+#endif
+
 void mpc8308_init(void)
 {
 	pca9698_direction_output(0x20, 26, 1);

configs/strider_con_dp_defconfig

@@ -0,0 +1,20 @@
+CONFIG_PPC=y
+CONFIG_MPC83xx=y
+CONFIG_TARGET_STRIDER=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_EXTRA_OPTIONS="STRIDER_CON_DP"
+CONFIG_HUSH_PARSER=y
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y

include/configs/strider.h

@@ -22,6 +22,8 @@
 
 #ifdef CONFIG_STRIDER_CPU
 #define CONFIG_IDENT_STRING	" strider cpu 0.01"
+#elif defined(CONFIG_STRIDER_CON_DP)
+#define CONFIG_IDENT_STRING	" strider con dp 0.01"
 #else
 #define CONFIG_IDENT_STRING	" strider con 0.01"
 #endif
@@ -225,15 +227,11 @@
 /*
  * FLASH on the Local Bus
  */
-#if 1
 #define CONFIG_SYS_FLASH_CFI		/* use the Common Flash Interface */
 #define CONFIG_FLASH_CFI_DRIVER		/* use the CFI driver */
 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
 #define CONFIG_FLASH_CFI_LEGACY
 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
-#else
-#define CONFIG_SYS_NO_FLASH
-#endif
 
 #define CONFIG_SYS_FLASH_BASE		0xFE000000 /* FLASH base address */
 #define CONFIG_SYS_FLASH_SIZE		8 /* FLASH size is up to 8M */
@@ -341,6 +339,22 @@
 #define CONFIG_SYS_I2C_IHS_SPEED_3		50000
 #define CONFIG_SYS_I2C_IHS_SLAVE_3		0x7F
 
+#ifdef CONFIG_STRIDER_CON_DP
+#define CONFIG_SYS_I2C_IHS_DUAL
+#define CONFIG_SYS_I2C_IHS_CH0_1
+#define CONFIG_SYS_I2C_IHS_SPEED_0_1		50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_0_1		0x7F
+#define CONFIG_SYS_I2C_IHS_CH1_1
+#define CONFIG_SYS_I2C_IHS_SPEED_1_1		50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_1_1		0x7F
+#define CONFIG_SYS_I2C_IHS_CH2_1
+#define CONFIG_SYS_I2C_IHS_SPEED_2_1		50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_2_1		0x7F
+#define CONFIG_SYS_I2C_IHS_CH3_1
+#define CONFIG_SYS_I2C_IHS_SPEED_3_1		50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_3_1		0x7F
+#endif
+
 /*
  * Software (bit-bang) I2C driver configuration
  */
@@ -357,7 +371,7 @@
 #define I2C_SOFT_DECLARATIONS4
 #define CONFIG_SYS_I2C_SOFT_SPEED_4		50000
 #define CONFIG_SYS_I2C_SOFT_SLAVE_4		0x7F
-#ifdef CONFIG_STRIDER_CON
+#if defined(CONFIG_STRIDER_CON) || defined(CONFIG_STRIDER_CON_DP)
 #define I2C_SOFT_DECLARATIONS5
 #define CONFIG_SYS_I2C_SOFT_SPEED_5		50000
 #define CONFIG_SYS_I2C_SOFT_SLAVE_5		0x7F
@@ -371,12 +385,33 @@
 #define CONFIG_SYS_I2C_SOFT_SPEED_8		50000
 #define CONFIG_SYS_I2C_SOFT_SLAVE_8		0x7F
 #endif
+#ifdef CONFIG_STRIDER_CON_DP
+#define I2C_SOFT_DECLARATIONS9
+#define CONFIG_SYS_I2C_SOFT_SPEED_9		50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_9		0x7F
+#define I2C_SOFT_DECLARATIONS10
+#define CONFIG_SYS_I2C_SOFT_SPEED_10		50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_10		0x7F
+#define I2C_SOFT_DECLARATIONS11
+#define CONFIG_SYS_I2C_SOFT_SPEED_11		50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_11		0x7F
+#define I2C_SOFT_DECLARATIONS12
+#define CONFIG_SYS_I2C_SOFT_SPEED_12		50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_12		0x7F
+#endif
 
 #ifdef CONFIG_STRIDER_CON
 #define CONFIG_SYS_ICS8N3QV01_I2C		{5, 6, 7, 8}
 #define CONFIG_SYS_CH7301_I2C			{5, 6, 7, 8}
 #define CONFIG_SYS_ADV7611_I2C			{5, 6, 7, 8}
 #define CONFIG_SYS_DP501_I2C			{1, 2, 3, 4}
+#define CONFIG_STRIDER_FANS			{ {10, 0x4c}, {11, 0x4c}, \
+						  {12, 0x4c} }
+#elif defined(CONFIG_STRIDER_CON_DP)
+#define CONFIG_SYS_ICS8N3QV01_I2C		{13, 14, 15, 16, 17, 18, 19, 20}
+#define CONFIG_SYS_CH7301_I2C			{1, 3, 5, 7}
+#define CONFIG_SYS_ADV7611_I2C			{1, 3, 5, 7}
+#define CONFIG_SYS_DP501_I2C			{1, 3, 5, 7, 2, 4, 6, 8}
 #define CONFIG_STRIDER_FANS			{ {10, 0x4c}, {11, 0x4c}, \
 						  {12, 0x4c} }
 #else
@@ -391,6 +426,8 @@
 void fpga_gpio_set(unsigned int bus, int pin);
 void fpga_gpio_clear(unsigned int bus, int pin);
 int fpga_gpio_get(unsigned int bus, int pin);
+void fpga_control_set(unsigned int bus, int pin);
+void fpga_control_clear(unsigned int bus, int pin);
 #endif
 
 #ifdef CONFIG_STRIDER_CON
@@ -398,12 +435,28 @@ int fpga_gpio_get(unsigned int bus, int pin);
 #define I2C_SCL_GPIO	((I2C_ADAP_HWNR > 3) ? 0x0100 : 0x0020)
 #define I2C_FPGA_IDX	((I2C_ADAP_HWNR > 3) ? \
 			 (I2C_ADAP_HWNR - 4) : I2C_ADAP_HWNR)
+#elif defined(CONFIG_STRIDER_CON_DP)
+#define I2C_SDA_GPIO	((I2C_ADAP_HWNR > 3) ? 0x0040 : 0x0200)
+#define I2C_SCL_GPIO	((I2C_ADAP_HWNR > 3) ? 0x0020 : 0x0100)
+#define I2C_FPGA_IDX	(I2C_ADAP_HWNR % 4)
 #else
 #define I2C_SDA_GPIO	0x0040
 #define I2C_SCL_GPIO	0x0020
 #define I2C_FPGA_IDX	I2C_ADAP_HWNR
 #endif
+
+#ifdef CONFIG_STRIDER_CON_DP
+#define I2C_ACTIVE \
+	do { \
+		if (I2C_ADAP_HWNR > 7) \
+			fpga_control_set(I2C_FPGA_IDX, 0x0004); \
+		else \
+			fpga_control_clear(I2C_FPGA_IDX, 0x0004); \
+	} while (0)
+#else
 #define I2C_ACTIVE	{ }
+#endif
+
 #define I2C_TRISTATE	{ }
 #define I2C_READ \
 	(fpga_gpio_get(I2C_FPGA_IDX, I2C_SDA_GPIO) ? 1 : 0)
@@ -436,6 +489,10 @@ int fpga_gpio_get(unsigned int bus, int pin);
 #define CONFIG_SYS_DP501_DIFFERENTIAL
 #define CONFIG_SYS_DP501_VCAPCTRL0	0x01 /* DDR mode 0, DE for H/VSYNC */
 
+#ifdef CONFIG_STRIDER_CON_DP
+#define CONFIG_SYS_OSD_DH
+#endif
+
 /*
  * General PCI
  * Addresses are mapped 1-1.

include/gdsys_fpga.h

@@ -163,7 +163,7 @@ struct ihs_fpga {
 };
 #endif
 
-#ifdef CONFIG_HRCON
+#if defined(CONFIG_HRCON) || defined(CONFIG_STRIDER_CON_DP)
 struct ihs_fpga {
 	u16 reflection_low;	/* 0x0000 */
 	u16 versions;		/* 0x0002 */