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x86: dts: Remove coreboot_fb.dtsi

There is no need to keep a separate coreboot_fb.dtsi since now we
have a generic coreboot payload dts.

While we are here, this also remove the out-of-date description in
the documentation regarding to coreboot framebuffer driver with
U-Boot loaded as a payload from coreboot. As the testing result with
QEMU 2.5.0 shows, the driver just works like a charm.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng 6 years ago
parent
commit
1cf6825a68

+ 0 - 1
arch/x86/dts/bayleybay.dts

@@ -15,7 +15,6 @@
 /include/ "reset.dtsi"
 /include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 /include/ "tsc_timer.dtsi"
-/include/ "coreboot_fb.dtsi"
 
 
 / {
 / {
 	model = "Intel Bayley Bay";
 	model = "Intel Bayley Bay";

+ 0 - 1
arch/x86/dts/chromebook_link.dts

@@ -8,7 +8,6 @@
 /include/ "reset.dtsi"
 /include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 /include/ "tsc_timer.dtsi"
-/include/ "coreboot_fb.dtsi"
 
 
 / {
 / {
 	model = "Google Link";
 	model = "Google Link";

+ 0 - 1
arch/x86/dts/chromebook_samus.dts

@@ -8,7 +8,6 @@
 /include/ "reset.dtsi"
 /include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 /include/ "tsc_timer.dtsi"
-/include/ "coreboot_fb.dtsi"
 
 
 / {
 / {
 	model = "Google Samus";
 	model = "Google Samus";

+ 0 - 1
arch/x86/dts/chromebox_panther.dts

@@ -5,7 +5,6 @@
 /include/ "reset.dtsi"
 /include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 /include/ "tsc_timer.dtsi"
-/include/ "coreboot_fb.dtsi"
 
 
 / {
 / {
 	model = "Google Panther";
 	model = "Google Panther";

+ 0 - 5
arch/x86/dts/coreboot_fb.dtsi

@@ -1,5 +0,0 @@
-/ {
-	coreboot-fb {
-		compatible = "coreboot-fb";
-	};
-};

+ 0 - 1
arch/x86/dts/minnowmax.dts

@@ -14,7 +14,6 @@
 /include/ "reset.dtsi"
 /include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 /include/ "tsc_timer.dtsi"
-/include/ "coreboot_fb.dtsi"
 
 
 / {
 / {
 	model = "Intel Minnowboard Max";
 	model = "Intel Minnowboard Max";

+ 0 - 7
doc/README.x86

@@ -412,17 +412,10 @@ To enable video you must enable these options in coreboot:
    - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5))
    - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5))
    - Keep VESA framebuffer
    - Keep VESA framebuffer
 
 
-And include coreboot_fb.dtsi in your board's device tree source file, like:
-
-   /include/ "coreboot_fb.dtsi"
-
 At present it seems that for Minnowboard Max, coreboot does not pass through
 At present it seems that for Minnowboard Max, coreboot does not pass through
 the video information correctly (it always says the resolution is 0x0). This
 the video information correctly (it always says the resolution is 0x0). This
 works correctly for link though.
 works correctly for link though.
 
 
-Note: coreboot framebuffer driver does not work on QEMU. The reason is unknown
-at this point. Patches are welcome if you figure out anything wrong.
-
 Test with QEMU for bare mode
 Test with QEMU for bare mode
 ----------------------------
 ----------------------------
 QEMU is a fancy emulator that can enable us to test U-Boot without access to
 QEMU is a fancy emulator that can enable us to test U-Boot without access to