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@@ -34,6 +34,19 @@ unsigned int exynos_dwmci_get_clk(int dev_index)
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return get_mmc_clk(dev_index);
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}
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+static void exynos_dwmci_board_init(struct dwmci_host *host)
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+{
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+ if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) {
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+ dwmci_writel(host, EMMCP_MPSBEGIN0, 0);
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+ dwmci_writel(host, EMMCP_SEND0, 0);
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+ dwmci_writel(host, EMMCP_CTRL0,
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+ MPSCTRL_SECURE_READ_BIT |
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+ MPSCTRL_SECURE_WRITE_BIT |
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+ MPSCTRL_NON_SECURE_READ_BIT |
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+ MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID);
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+ }
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+}
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+
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/*
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* This function adds the mmc channel to be registered with mmc core.
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* index - mmc channel number.
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@@ -65,6 +78,7 @@ int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel)
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#ifdef CONFIG_EXYNOS5420
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host->quirks = DWMCI_QUIRK_DISABLE_SMU;
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#endif
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+ host->board_init = exynos_dwmci_board_init;
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if (clksel) {
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host->clksel_val = clksel;
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