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arm: atmel: sama5d3: correct the ID for DBGU and PIT

As the DBGU and PIT has its own ID on sama5d3 SoC, while not share
with SYS ID. So, correct them.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Bo Shen 11 years ago
parent
commit
184c551b85
2 changed files with 2 additions and 2 deletions
  1. 1 1
      arch/arm/cpu/armv7/at91/sama5d3_devices.c
  2. 1 1
      arch/arm/cpu/armv7/at91/timer.c

+ 1 - 1
arch/arm/cpu/armv7/at91/sama5d3_devices.c

@@ -84,7 +84,7 @@ void at91_seriald_hw_init(void)
 	at91_set_a_periph(AT91_PIO_PORTB, 30, 0);	/* DRXD */
 
 	/* Enable clock */
-	at91_periph_clk_enable(ATMEL_ID_SYS);
+	at91_periph_clk_enable(ATMEL_ID_DBGU);
 }
 
 #if defined(CONFIG_ATMEL_SPI)

+ 1 - 1
arch/arm/cpu/armv7/at91/timer.c

@@ -60,7 +60,7 @@ int timer_init(void)
 	at91_pit_t *pit = (at91_pit_t *)ATMEL_BASE_PIT;
 
 	/* Enable PITC Clock */
-	at91_periph_clk_enable(ATMEL_ID_SYS);
+	at91_periph_clk_enable(ATMEL_ID_PIT);
 
 	/* Enable PITC */
 	writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);