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@@ -510,6 +510,30 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
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#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
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+#define CONFIG_SYS_PCI_64BIT
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+
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+#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000
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+#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */
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+#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000
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+#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */
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+
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+#define CONFIG_SYS_PCIE_IO_BUS 0x00000000
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+#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000
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+#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */
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+
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+#define CONFIG_SYS_PCIE_MEM_BUS 0x08000000
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+#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000
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+#define CONFIG_SYS_PCIE_MEM_SIZE 0x08000000 /* 128M */
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+
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+#ifdef CONFIG_PCI
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+#define CONFIG_NET_MULTI
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+#define CONFIG_PCI_PNP
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+#define CONFIG_E1000
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+#define CONFIG_PCI_SCAN_SHOW
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+#define CONFIG_CMD_PCI
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+#define CONFIG_CMD_NET
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+#endif
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+
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_MII
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