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@@ -1,7 +1,7 @@
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/*
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- * i2c.c - driver for Blackfin on-chip TWI/I2C
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+ * i2c.c - driver for ADI TWI/I2C
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*
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- * Copyright (c) 2006-2010 Analog Devices Inc.
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+ * Copyright (c) 2006-2013 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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@@ -11,6 +11,7 @@
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#include <asm/clock.h>
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#include <asm/twi.h>
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+#include <asm/io.h>
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/* Every register is 32bit aligned, but only 16bits in size */
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#define ureg(name) u16 name; u16 __pad_##name;
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@@ -39,7 +40,7 @@ struct twi_regs {
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#ifdef TWI_CLKDIV
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#define TWI0_CLKDIV TWI_CLKDIV
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#endif
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-static volatile struct twi_regs *twi = (void *)TWI0_CLKDIV;
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+static struct twi_regs *twi = (void *)TWI0_CLKDIV;
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#ifdef DEBUG
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# define dmemset(s, c, n) memset(s, c, n)
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@@ -93,53 +94,54 @@ struct i2c_msg {
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*/
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static int wait_for_completion(struct i2c_msg *msg)
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{
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- uint16_t int_stat;
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+ u16 int_stat, ctl;
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ulong timebase = get_timer(0);
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do {
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- int_stat = twi->int_stat;
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+ int_stat = readw(&twi->int_stat);
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if (int_stat & XMTSERV) {
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debugi("processing XMTSERV");
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- twi->int_stat = XMTSERV;
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- SSYNC();
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+ writew(XMTSERV, &twi->int_stat);
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if (msg->alen) {
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- twi->xmt_data8 = *(msg->abuf++);
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+ writew(*(msg->abuf++), &twi->xmt_data8);
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--msg->alen;
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} else if (!(msg->flags & I2C_M_COMBO) && msg->len) {
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- twi->xmt_data8 = *(msg->buf++);
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+ writew(*(msg->buf++), &twi->xmt_data8);
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--msg->len;
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} else {
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- twi->master_ctl |= (msg->flags & I2C_M_COMBO) ? RSTART | MDIR : STOP;
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- SSYNC();
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+ ctl = readw(&twi->master_ctl);
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+ if (msg->flags & I2C_M_COMBO)
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+ writew(ctl | RSTART | MDIR,
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+ &twi->master_ctl);
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+ else
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+ writew(ctl | STOP, &twi->master_ctl);
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}
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}
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if (int_stat & RCVSERV) {
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debugi("processing RCVSERV");
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- twi->int_stat = RCVSERV;
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- SSYNC();
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+ writew(RCVSERV, &twi->int_stat);
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if (msg->len) {
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- *(msg->buf++) = twi->rcv_data8;
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+ *(msg->buf++) = readw(&twi->rcv_data8);
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--msg->len;
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} else if (msg->flags & I2C_M_STOP) {
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- twi->master_ctl |= STOP;
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- SSYNC();
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+ ctl = readw(&twi->master_ctl);
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+ writew(ctl | STOP, &twi->master_ctl);
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}
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}
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if (int_stat & MERR) {
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debugi("processing MERR");
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- twi->int_stat = MERR;
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- SSYNC();
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+ writew(MERR, &twi->int_stat);
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return msg->len;
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}
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if (int_stat & MCOMP) {
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debugi("processing MCOMP");
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- twi->int_stat = MCOMP;
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- SSYNC();
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+ writew(MCOMP, &twi->int_stat);
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if (msg->flags & I2C_M_COMBO && msg->len) {
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- twi->master_ctl = (twi->master_ctl & ~RSTART) |
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+ ctl = readw(&twi->master_ctl);
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+ ctl = (ctl & ~RSTART) |
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(min(msg->len, 0xff) << 6) | MEN | MDIR;
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- SSYNC();
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+ writew(ctl, &twi->master_ctl);
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} else
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break;
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}
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@@ -160,8 +162,11 @@ static int wait_for_completion(struct i2c_msg *msg)
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* Here we just get the i2c stuff all prepped and ready, and then tail off
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* into wait_for_completion() for all the bits to go.
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*/
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-static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer, int len, u8 flags)
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+static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
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+ int len, u8 flags)
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{
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+ int ret;
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+ u16 ctl;
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uchar addr_buffer[] = {
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(addr >> 0),
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(addr >> 8),
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@@ -174,62 +179,59 @@ static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer, int len,
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.abuf = addr_buffer,
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.alen = alen,
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};
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- int ret;
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dmemset(buffer, 0xff, len);
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- debugi("chip=0x%x addr=0x%02x alen=%i buf[0]=0x%02x len=%i flags=0x%02x[%s] ",
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- chip, addr, alen, buffer[0], len, flags, (flags & I2C_M_READ ? "rd" : "wr"));
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+ debugi("chip=0x%x addr=0x%02x alen=%i buf[0]=0x%02x len=%i ",
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+ chip, addr, alen, buffer[0], len);
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+ debugi("flags=0x%02x[%s] ", flags,
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+ (flags & I2C_M_READ ? "rd" : "wr"));
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/* wait for things to settle */
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- while (twi->master_stat & BUSBUSY)
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+ while (readw(&twi->master_stat) & BUSBUSY)
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if (ctrlc())
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return 1;
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/* Set Transmit device address */
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- twi->master_addr = chip;
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+ writew(chip, &twi->master_addr);
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/* Clear the FIFO before starting things */
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- twi->fifo_ctl = XMTFLUSH | RCVFLUSH;
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- SSYNC();
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- twi->fifo_ctl = 0;
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- SSYNC();
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+ writew(XMTFLUSH | RCVFLUSH, &twi->fifo_ctl);
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+ writew(0, &twi->fifo_ctl);
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/* prime the pump */
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if (msg.alen) {
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len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len;
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debugi("first byte=0x%02x", *msg.abuf);
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- twi->xmt_data8 = *(msg.abuf++);
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+ writew(*(msg.abuf++), &twi->xmt_data8);
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--msg.alen;
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} else if (!(msg.flags & I2C_M_READ) && msg.len) {
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debugi("first byte=0x%02x", *msg.buf);
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- twi->xmt_data8 = *(msg.buf++);
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+ writew(*(msg.buf++), &twi->xmt_data8);
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--msg.len;
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}
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/* clear int stat */
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- twi->master_stat = -1;
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- twi->int_stat = -1;
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- twi->int_mask = 0;
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- SSYNC();
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+ writew(-1, &twi->master_stat);
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+ writew(-1, &twi->int_stat);
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+ writew(0, &twi->int_mask);
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/* Master enable */
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- twi->master_ctl =
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- (twi->master_ctl & FAST) |
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- (min(len, 0xff) << 6) | MEN |
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- ((msg.flags & I2C_M_READ) ? MDIR : 0);
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- SSYNC();
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- debugi("CTL=0x%04x", twi->master_ctl);
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+ ctl = readw(&twi->master_ctl);
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+ ctl = (ctl & FAST) | (min(len, 0xff) << 6) | MEN |
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+ ((msg.flags & I2C_M_READ) ? MDIR : 0);
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+ writew(ctl, &twi->master_ctl);
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/* process the rest */
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ret = wait_for_completion(&msg);
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debugi("ret=%d", ret);
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if (ret) {
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- twi->master_ctl &= ~MEN;
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- twi->control &= ~TWI_ENA;
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- SSYNC();
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- twi->control |= TWI_ENA;
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- SSYNC();
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+ ctl = readw(&twi->master_ctl) & ~MEN;
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+ writew(ctl, &twi->master_ctl);
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+ ctl = readw(&twi->control) & ~TWI_ENA;
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+ writew(ctl, &twi->control);
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+ ctl = readw(&twi->control) | TWI_ENA;
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+ writew(ctl, &twi->control);
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}
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return ret;
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@@ -246,10 +248,11 @@ int i2c_set_bus_speed(unsigned int speed)
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/* Set TWI interface clock */
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if (clkdiv < I2C_DUTY_MAX || clkdiv > I2C_DUTY_MIN)
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return -1;
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- twi->clkdiv = (clkdiv << 8) | (clkdiv & 0xff);
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+ clkdiv = (clkdiv << 8) | (clkdiv & 0xff);
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+ writew(clkdiv, &twi->clkdiv);
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/* Don't turn it on */
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- twi->master_ctl = (speed > 100000 ? FAST : 0);
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+ writew(speed > 100000 ? FAST : 0, &twi->master_ctl);
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return 0;
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}
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@@ -260,8 +263,9 @@ int i2c_set_bus_speed(unsigned int speed)
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*/
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unsigned int i2c_get_bus_speed(void)
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{
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+ u16 clkdiv = readw(&twi->clkdiv) & 0xff;
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/* 10 MHz / (2 * CLKDIV) -> 5 MHz / CLKDIV */
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- return 5000000 / (twi->clkdiv & 0xff);
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+ return 5000000 / clkdiv;
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}
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/**
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@@ -274,27 +278,22 @@ unsigned int i2c_get_bus_speed(void)
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*/
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void i2c_init(int speed, int slaveaddr)
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{
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- uint8_t prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F;
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+ u16 prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F;
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/* Set TWI internal clock as 10MHz */
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- twi->control = prescale;
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+ writew(prescale, &twi->control);
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/* Set TWI interface clock as specified */
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i2c_set_bus_speed(speed);
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/* Enable it */
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- twi->control = TWI_ENA | prescale;
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- SSYNC();
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+ writew(TWI_ENA | prescale, &twi->control);
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- debugi("CONTROL:0x%04x CLKDIV:0x%04x", twi->control, twi->clkdiv);
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+ debugi("CONTROL:0x%04x CLKDIV:0x%04x", readw(&twi->control),
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+ readw(&twi->clkdiv));
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#if CONFIG_SYS_I2C_SLAVE
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# error I2C slave support not tested/supported
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- /* If they want us as a slave, do it */
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- if (slaveaddr) {
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- twi->slave_addr = slaveaddr;
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- twi->slave_ctl = SEN;
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- }
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#endif
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}
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@@ -320,7 +319,8 @@ int i2c_probe(uchar chip)
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*/
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int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
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{
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- return i2c_transfer(chip, addr, alen, buffer, len, (alen ? I2C_M_COMBO : I2C_M_READ));
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+ return i2c_transfer(chip, addr, alen, buffer,
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+ len, (alen ? I2C_M_COMBO : I2C_M_READ));
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}
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/**
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@@ -346,15 +346,21 @@ int i2c_set_bus_num(unsigned int bus)
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{
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switch (bus) {
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#if CONFIG_SYS_MAX_I2C_BUS > 0
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- case 0: twi = (void *)TWI0_CLKDIV; return 0;
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+ case 0:
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+ twi = (void *)TWI0_CLKDIV;
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+ return 0;
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 1
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- case 1: twi = (void *)TWI1_CLKDIV; return 0;
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+ case 1:
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+ twi = (void *)TWI1_CLKDIV;
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+ return 0;
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 2
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- case 2: twi = (void *)TWI2_CLKDIV; return 0;
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+ case 2:
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+ twi = (void *)TWI2_CLKDIV;
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+ return 0;
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#endif
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- default: return -1;
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+ default: return -1;
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}
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}
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@@ -365,14 +371,17 @@ unsigned int i2c_get_bus_num(void)
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{
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switch ((unsigned long)twi) {
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#if CONFIG_SYS_MAX_I2C_BUS > 0
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- case TWI0_CLKDIV: return 0;
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+ case TWI0_CLKDIV:
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+ return 0;
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 1
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- case TWI1_CLKDIV: return 1;
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+ case TWI1_CLKDIV:
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+ return 1;
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 2
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- case TWI2_CLKDIV: return 2;
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+ case TWI2_CLKDIV:
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+ return 2;
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#endif
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- default: return -1;
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+ default: return -1;
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}
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}
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