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@@ -1042,7 +1042,7 @@ u32 imx_get_fecclk(void)
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return mxc_get_clock(MXC_IPG_CLK);
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return mxc_get_clock(MXC_IPG_CLK);
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}
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}
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-#if defined(CONFIG_CMD_SATA) || defined(CONFIG_PCIE_IMX)
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+#if defined(CONFIG_SATA) || defined(CONFIG_PCIE_IMX)
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static int enable_enet_pll(uint32_t en)
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static int enable_enet_pll(uint32_t en)
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{
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{
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struct mxc_ccm_reg *const imx_ccm
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struct mxc_ccm_reg *const imx_ccm
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@@ -1069,7 +1069,7 @@ static int enable_enet_pll(uint32_t en)
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}
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}
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#endif
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#endif
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-#ifdef CONFIG_CMD_SATA
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+#ifdef CONFIG_SATA
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static void ungate_sata_clock(void)
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static void ungate_sata_clock(void)
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{
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{
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struct mxc_ccm_reg *const imx_ccm =
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struct mxc_ccm_reg *const imx_ccm =
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@@ -1143,7 +1143,7 @@ int enable_pcie_clock(void)
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clrbits_le32(&ccm_regs->cbcmr, MXC_CCM_CBCMR_PCIE_AXI_CLK_SEL);
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clrbits_le32(&ccm_regs->cbcmr, MXC_CCM_CBCMR_PCIE_AXI_CLK_SEL);
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/* Party time! Ungate the clock to the PCIe. */
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/* Party time! Ungate the clock to the PCIe. */
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-#ifdef CONFIG_CMD_SATA
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+#ifdef CONFIG_SATA
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ungate_sata_clock();
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ungate_sata_clock();
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#endif
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#endif
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ungate_pcie_clock();
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ungate_pcie_clock();
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