Merge branch 'master' of git://git.denx.de/u-boot-atmel

arch/arm/mach-at91/Kconfig

@@ -66,6 +66,7 @@ config TARGET_STAMP9G20
 config TARGET_AT91SAM9M10G45EK
 	bool "Atmel AT91SAM9M10G45-EK board"
 	select CPU_ARM926EJS
+	select SUPPORT_SPL
 
 config TARGET_PM9G45
 	bool "Ronetix pm9g45 board"
@@ -74,6 +75,7 @@ config TARGET_PM9G45
 config TARGET_AT91SAM9N12EK
 	bool "Atmel AT91SAM9N12-EK board"
 	select CPU_ARM926EJS
+	select SUPPORT_SPL
 
 config TARGET_AT91SAM9RLEK
 	bool "Atmel at91sam9rl reference board"
@@ -82,6 +84,7 @@ config TARGET_AT91SAM9RLEK
 config TARGET_AT91SAM9X5EK
 	bool "Atmel AT91SAM9X5-EK board"
 	select CPU_ARM926EJS
+	select SUPPORT_SPL
 
 config TARGET_SAMA5D3_XPLAINED
 	bool "SAMA5D3 Xplained board"

arch/arm/mach-at91/Makefile

@@ -2,6 +2,8 @@ obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o
 ifneq ($(CONFIG_SPL_BUILD),)
 obj-$(CONFIG_AT91SAM9G20) += sdram.o spl_at91.o
 obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o
+obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
+obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
 obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
 obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o
 obj-y += spl.o

arch/arm/mach-at91/arm926ejs/clock.c

@@ -195,50 +195,52 @@ int at91_clock_init(unsigned long main_clock)
 void at91_plla_init(u32 pllar)
 {
 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	int timeout = AT91_PLL_LOCK_TIMEOUT;
 
 	writel(pllar, &pmc->pllar);
-	while (!(readl(&pmc->sr) & (AT91_PMC_LOCKA | AT91_PMC_MCKRDY))) {
-		timeout--;
-		if (timeout == 0)
-			break;
-	}
+	while (!(readl(&pmc->sr) & AT91_PMC_LOCKA))
+		;
 }
 void at91_pllb_init(u32 pllbr)
 {
 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	int timeout = AT91_PLL_LOCK_TIMEOUT;
 
 	writel(pllbr, &pmc->pllbr);
-	while (!(readl(&pmc->sr) & (AT91_PMC_LOCKB | AT91_PMC_MCKRDY))) {
-		timeout--;
-		if (timeout == 0)
-			break;
-	}
+	while (!(readl(&pmc->sr) & AT91_PMC_LOCKB))
+		;
 }
 
 void at91_mck_init(u32 mckr)
 {
 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	int timeout = AT91_PLL_LOCK_TIMEOUT;
 	u32 tmp;
 
 	tmp = readl(&pmc->mckr);
-	tmp &= ~(AT91_PMC_MCKR_PRES_MASK |
-		 AT91_PMC_MCKR_MDIV_MASK |
-		 AT91_PMC_MCKR_PLLADIV_MASK |
-		 AT91_PMC_MCKR_CSS_MASK);
-	tmp |= mckr & (AT91_PMC_MCKR_PRES_MASK |
-		       AT91_PMC_MCKR_MDIV_MASK |
-		       AT91_PMC_MCKR_PLLADIV_MASK |
-		       AT91_PMC_MCKR_CSS_MASK);
+	tmp &= ~AT91_PMC_MCKR_PRES_MASK;
+	tmp |= mckr & AT91_PMC_MCKR_PRES_MASK;
 	writel(tmp, &pmc->mckr);
+	while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
+		;
 
-	while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY)) {
-		timeout--;
-		if (timeout == 0)
-			break;
-	}
+	tmp = readl(&pmc->mckr);
+	tmp &= ~AT91_PMC_MCKR_MDIV_MASK;
+	tmp |= mckr & AT91_PMC_MCKR_MDIV_MASK;
+	writel(tmp, &pmc->mckr);
+	while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
+		;
+
+	tmp = readl(&pmc->mckr);
+	tmp &= ~AT91_PMC_MCKR_PLLADIV_MASK;
+	tmp |= mckr & AT91_PMC_MCKR_PLLADIV_MASK;
+	writel(tmp, &pmc->mckr);
+	while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
+		;
+
+	tmp = readl(&pmc->mckr);
+	tmp &= ~AT91_PMC_MCKR_CSS_MASK;
+	tmp |= mckr & AT91_PMC_MCKR_CSS_MASK;
+	writel(tmp, &pmc->mckr);
+	while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
+		;
 }
 
 void at91_periph_clk_enable(int id)

arch/arm/mach-at91/arm926ejs/timer.c

@@ -33,22 +33,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define TIMER_LOAD_VAL	0xfffff
 
-static inline unsigned long long tick_to_time(unsigned long long tick)
-{
-	tick *= CONFIG_SYS_HZ;
-	do_div(tick, gd->arch.timer_rate_hz);
-
-	return tick;
-}
-
-static inline unsigned long long usec_to_tick(unsigned long long usec)
-{
-	usec *= gd->arch.timer_rate_hz;
-	do_div(usec, 1000000);
-
-	return usec;
-}
-
 /*
  * Use the PITC in full 32 bit incrementing mode
  */
@@ -64,53 +48,10 @@ int timer_init(void)
 	writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
 
 	gd->arch.timer_rate_hz = gd->arch.mck_rate_hz / 16;
-	gd->arch.tbu = gd->arch.tbl = 0;
 
 	return 0;
 }
 
-/*
- * Get the current 64 bit timer tick count
- */
-unsigned long long get_ticks(void)
-{
-	at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT;
-
-	ulong now = readl(&pit->piir);
-
-	/* increment tbu if tbl has rolled over */
-	if (now < gd->arch.tbl)
-		gd->arch.tbu++;
-	gd->arch.tbl = now;
-	return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
-}
-
-void __udelay(unsigned long usec)
-{
-	unsigned long long start;
-	ulong tmo;
-
-	start = get_ticks();		/* get current timestamp */
-	tmo = usec_to_tick(usec);	/* convert usecs to ticks */
-	while ((get_ticks() - start) < tmo)
-		;			/* loop till time has passed */
-}
-
-/*
- * get_timer(base) can be used to check for timeouts or
- * to measure elasped time relative to an event:
- *
- * ulong start_time = get_timer(0) sets start_time to the current
- * time value.
- * get_timer(start_time) returns the time elapsed since then.
- *
- * The time is used in CONFIG_SYS_HZ units!
- */
-ulong get_timer(ulong base)
-{
-	return tick_to_time(get_ticks()) - base;
-}
-
 /*
  * Return the number of timer ticks per second.
  */

arch/arm/mach-at91/arm926ejs/u-boot-spl.lds

@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2015 Atmel Corporation
+ *		      Bo Shen <voice.shen@atmel.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \
+		LENGTH = CONFIG_SPL_MAX_SIZE }
+MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
+		LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	.text      :
+	{
+		__start = .;
+		*(.vectors)
+		arch/arm/cpu/arm926ejs/start.o	(.text*)
+		*(.text*)
+	} >.sram
+
+	. = ALIGN(4);
+	.rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
+
+	. = ALIGN(4);
+	.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
+
+	. = ALIGN(4);
+	__image_copy_end = .;
+
+	.end :
+	{
+		*(.__end)
+	} >.sram
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start = .;
+		*(.bss*)
+		. = ALIGN(4);
+		__bss_end = .;
+	} >.sdram
+}

arch/arm/mach-at91/armv7/timer.c

@@ -36,22 +36,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define TIMER_LOAD_VAL	0xfffff
 
-static inline unsigned long long tick_to_time(unsigned long long tick)
-{
-	tick *= CONFIG_SYS_HZ;
-	do_div(tick, gd->arch.timer_rate_hz);
-
-	return tick;
-}
-
-static inline unsigned long long usec_to_tick(unsigned long long usec)
-{
-	usec *= gd->arch.timer_rate_hz;
-	do_div(usec, 1000000);
-
-	return usec;
-}
-
 /*
  * Use the PITC in full 32 bit incrementing mode
  */
@@ -67,54 +51,9 @@ int timer_init(void)
 
 	gd->arch.timer_rate_hz = get_pit_clk_rate() / 16;
 
-	gd->arch.tbu = 0;
-	gd->arch.tbl = 0;
-
 	return 0;
 }
 
-/*
- * Get the current 64 bit timer tick count
- */
-unsigned long long get_ticks(void)
-{
-	at91_pit_t *pit = (at91_pit_t *)ATMEL_BASE_PIT;
-
-	ulong now = readl(&pit->piir);
-
-	/* increment tbu if tbl has rolled over */
-	if (now < gd->arch.tbl)
-		gd->arch.tbu++;
-	gd->arch.tbl = now;
-	return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
-}
-
-void __udelay(unsigned long usec)
-{
-	unsigned long long start;
-	ulong tmo;
-
-	start = get_ticks();		/* get current timestamp */
-	tmo = usec_to_tick(usec);	/* convert usecs to ticks */
-	while ((get_ticks() - start) < tmo)
-		;			/* loop till time has passed */
-}
-
-/*
- * get_timer(base) can be used to check for timeouts or
- * to measure elasped time relative to an event:
- *
- * ulong start_time = get_timer(0) sets start_time to the current
- * time value.
- * get_timer(start_time) returns the time elapsed since then.
- *
- * The time is used in CONFIG_SYS_HZ units!
- */
-ulong get_timer(ulong base)
-{
-	return tick_to_time(get_ticks()) - base;
-}
-
 /*
  * Return the number of timer ticks per second.
  */

arch/arm/mach-at91/include/mach/at91_pmc.h

@@ -97,7 +97,8 @@ typedef struct at91_pmc {
 #define AT91_PMC_MCKR_CSS_PLLB		0x00000003
 #define AT91_PMC_MCKR_CSS_MASK		0x00000003
 
-#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
+#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
+	defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
 #define AT91_PMC_MCKR_PRES_1		0x00000000
 #define AT91_PMC_MCKR_PRES_2		0x00000010
 #define AT91_PMC_MCKR_PRES_4		0x00000020
@@ -126,7 +127,8 @@ typedef struct at91_pmc {
 #else
 #define AT91_PMC_MCKR_MDIV_1		0x00000000
 #define AT91_PMC_MCKR_MDIV_2		0x00000100
-#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
+#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
+	defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
 #define AT91_PMC_MCKR_MDIV_3		0x00000300
 #endif
 #define AT91_PMC_MCKR_MDIV_4		0x00000200

arch/arm/mach-at91/include/mach/at91sam9260.h

@@ -133,6 +133,9 @@
 #define ATMEL_BASE_CS6		0x70000000
 #define ATMEL_BASE_CS7		0x80000000
 
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER	0xfffffd3c
+
 /*
  * Other misc defines
  */

arch/arm/mach-at91/include/mach/at91sam9261.h

@@ -117,6 +117,9 @@
 #define ATMEL_BASE_CS6		0x70000000
 #define ATMEL_BASE_CS7		0x80000000
 
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER	0xfffffd3c
+
 /*
  * Other misc defines
  */

arch/arm/mach-at91/include/mach/at91sam9263.h

@@ -132,6 +132,9 @@
 #define ATMEL_BASE_CS6		0x70000000
 #define ATMEL_BASE_CS7		0x80000000
 
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER	0xfffffd3c
+
 /*
  * Other misc defines
  */

arch/arm/mach-at91/include/mach/at91sam9g45.h

@@ -136,6 +136,9 @@
 #define ATMEL_BASE_CS6		0x70000000
 #define ATMEL_BASE_CS7		0x80000000
 
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER	0xfffffd3c
+
 /*
  * Other misc defines
  */

arch/arm/mach-at91/include/mach/at91sam9rl.h

@@ -116,6 +116,9 @@
 #define ATMEL_BASE_CS4		0x50000000	/* Compact Flash Slot 0 */
 #define ATMEL_BASE_CS5		0x60000000	/* Compact Flash Slot 1 */
 
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER	0xfffffd3c
+
 /*
  * Other misc defines
  */

arch/arm/mach-at91/include/mach/at91sam9x5.h

@@ -124,6 +124,16 @@
 #define ATMEL_BASE_EHCI		0x00700000 /* USB Host controller (EHCI) */
 #endif
 
+/*
+ * External memory
+ */
+#define ATMEL_BASE_CS0		0x10000000
+#define ATMEL_BASE_CS1		0x20000000
+#define ATMEL_BASE_CS2		0x30000000
+#define ATMEL_BASE_CS3		0x40000000
+#define ATMEL_BASE_CS4		0x50000000
+#define ATMEL_BASE_CS5		0x60000000
+
 /* 9x5 series chip id definitions */
 #define ARCH_ID_AT91SAM9X5	0x819a05a0
 #define ARCH_ID_VERSION_MASK	0x1f
@@ -154,6 +164,9 @@
 #define ATMEL_CPU_NAME	get_cpu_name()
 #endif
 
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER	0xfffffe3c
+
 /*
  * Other misc defines
  */

arch/arm/mach-at91/include/mach/sama5d3.h

@@ -189,6 +189,9 @@
 #define PIO_SCDR_DIV		0x3fff
 #define CPU_HAS_PCR
 
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER	0xfffffe3c
+
 /*
  * PMECC table in ROM
  */

arch/arm/mach-at91/include/mach/sama5d4.h

@@ -193,6 +193,9 @@
 #define cpu_is_sama5d44()	(cpu_is_sama5d4() && \
 		(get_extension_chip_id() == ARCH_EXID_SAMA5D44))
 
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER	0xfc06863c
+
 /*
  * No PMECC Galois table in ROM
  */

arch/arm/mach-at91/mpddrc.c

@@ -19,7 +19,8 @@ static inline void atmel_mpddr_op(int mode, u32 ram_address)
 
 static int ddr2_decodtype_is_seq(u32 cr)
 {
-#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
+#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
+	defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
 	if (cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED)
 		return 0;
 #endif

arch/arm/mach-at91/spl.c

@@ -29,7 +29,7 @@ u32 spl_boot_device(void)
 	return BOOT_DEVICE_MMC1;
 #elif CONFIG_SYS_USE_NANDFLASH
 	return BOOT_DEVICE_NAND;
-#elif CONFIG_SYS_USE_SERIALFLASH
+#elif CONFIG_SYS_USE_SERIALFLASH || CONFIG_SYS_USE_SPIFLASH
 	return BOOT_DEVICE_SPI;
 #endif
 	return BOOT_DEVICE_NONE;

arch/arm/mach-at91/spl_at91.c

@@ -71,7 +71,11 @@ void __weak at91_spl_board_init(void)
 {
 }
 
-void spl_board_init(void)
+void __weak spl_board_init(void)
+{
+}
+
+void board_init_f(ulong dummy)
 {
 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 
@@ -111,9 +115,14 @@ void spl_board_init(void)
 	timer_init();
 
 	/* enable clocks for all PIOs */
+#if defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
+	at91_periph_clk_enable(ATMEL_ID_PIOAB);
+	at91_periph_clk_enable(ATMEL_ID_PIOCD);
+#else
 	at91_periph_clk_enable(ATMEL_ID_PIOA);
 	at91_periph_clk_enable(ATMEL_ID_PIOB);
 	at91_periph_clk_enable(ATMEL_ID_PIOC);
+#endif
 	/* init console */
 	at91_seriald_hw_init();
 	preloader_console_init();

arch/arm/mach-at91/spl_atmel.c

@@ -70,7 +70,12 @@ __weak void redirect_int_from_saic_to_aic(void)
 	/* This only be used for sama5d4 soc now */
 }
 
+/* empty stub to satisfy current lowlevel_init, can be removed any time */
 void s_init(void)
+{
+}
+
+void board_init_f(ulong dummy)
 {
 	switch_to_main_crystal_osc();
 
@@ -93,4 +98,9 @@ void s_init(void)
 	preloader_console_init();
 
 	mem_init();
+
+	/* Clear the BSS. */
+	memset(__bss_start, 0, __bss_end - __bss_start);
+
+	board_init_r(NULL, 0);
 }

board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c

@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <asm/arch/clk.h>
 #include <asm/arch/at91sam9g45_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
@@ -15,6 +16,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/clk.h>
 #include <lcd.h>
+#include <linux/mtd/nand.h>
 #include <atmel_lcdc.h>
 #include <atmel_mci.h>
 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
@@ -71,6 +73,84 @@ void at91sam9m10g45ek_nand_hw_init(void)
 }
 #endif
 
+#if defined(CONFIG_SPL_BUILD)
+#include <spl.h>
+#include <nand.h>
+
+void at91_spl_board_init(void)
+{
+	/*
+	 * On the at91sam9m10g45ek board, the chip wm9711 stays in the
+	 * test mode, so it needs do some action to exit test mode.
+	 */
+	at91_periph_clk_enable(ATMEL_ID_PIODE);
+	at91_set_gpio_output(AT91_PIN_PD7, 0);
+	at91_set_gpio_output(AT91_PIN_PD8, 0);
+	at91_set_pio_pullup(AT91_PIO_PORTD, 7, 1);
+	at91_set_pio_pullup(AT91_PIO_PORTD, 8, 1);
+
+#ifdef CONFIG_SYS_USE_MMC
+	at91_mci_hw_init();
+#elif CONFIG_SYS_USE_NANDFLASH
+	at91sam9m10g45ek_nand_hw_init();
+#endif
+}
+
+#include <asm/arch/atmel_mpddrc.h>
+static void ddr2_conf(struct atmel_mpddr *ddr2)
+{
+	ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
+
+	ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
+		    ATMEL_MPDDRC_CR_NR_ROW_14 |
+		    ATMEL_MPDDRC_CR_DQMS_SHARED |
+		    ATMEL_MPDDRC_CR_CAS_DDR_CAS3);
+
+	ddr2->rtr = 0x24b;
+
+	ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |/* 6*7.5 = 45 ns */
+		      2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET |/* 2*7.5 = 15 ns */
+		      2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | /* 2*7.5 = 15 ns */
+		      8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET | /* 8*7.5 = 60 ns */
+		      2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET | /* 2*7.5 = 15 ns */
+		      1 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET | /* 1*7.5= 7.5 ns*/
+		      1 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET | /* 1 clk cycle */
+		      2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET); /* 2 clk cycles */
+
+	ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | /* 2*7.5 = 15 ns */
+		      200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET |
+		      16 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET |
+		      14 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET);
+
+	ddr2->tpr2 = (1 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET |
+		      0 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET |
+		      7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
+}
+
+void mem_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+	struct atmel_mpddr ddr2;
+	unsigned long csa;
+
+	ddr2_conf(&ddr2);
+
+	/* enable DDR2 clock */
+	writel(0x4, &pmc->scer);
+
+	/* Chip select 1 is for DDR2/SDRAM */
+	csa = readl(&mat->ebicsa);
+	csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
+	csa &= ~AT91_MATRIX_EBI_VDDIOMSEL_3_3V;
+	writel(csa, &mat->ebicsa);
+
+	/* DDRAM2 Controller initialize */
+	ddr2_init(ATMEL_BASE_CS6, &ddr2);
+}
+#endif
+
 #ifdef CONFIG_CMD_USB
 static void at91sam9m10g45ek_usb_hw_init(void)
 {

board/atmel/at91sam9n12ek/at91sam9n12ek.c

@@ -257,3 +257,76 @@ int dram_init(void)
 					CONFIG_SYS_SDRAM_SIZE);
 	return 0;
 }
+
+#if defined(CONFIG_SPL_BUILD)
+#include <spl.h>
+#include <nand.h>
+
+void at91_spl_board_init(void)
+{
+#ifdef CONFIG_SYS_USE_MMC
+	at91_mci_hw_init();
+#elif CONFIG_SYS_USE_NANDFLASH
+	at91sam9n12ek_nand_hw_init();
+#elif CONFIG_SYS_USE_SPIFLASH
+	at91_spi0_hw_init(1 << 4);
+#endif
+}
+
+#include <asm/arch/atmel_mpddrc.h>
+static void ddr2_conf(struct atmel_mpddr *ddr2)
+{
+	ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
+
+	ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
+		    ATMEL_MPDDRC_CR_NR_ROW_13 |
+		    ATMEL_MPDDRC_CR_CAS_DDR_CAS3 |
+		    ATMEL_MPDDRC_CR_NB_8BANKS |
+		    ATMEL_MPDDRC_CR_DECOD_INTERLEAVED);
+
+	ddr2->rtr = 0x411;
+
+	ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET |
+		      8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET);
+
+	ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET |
+		      200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET |
+		      19 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET |
+		      18 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET);
+
+	ddr2->tpr2 = (2 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET |
+		      3 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET |
+		      7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
+}
+
+void mem_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+	struct atmel_mpddr ddr2;
+	unsigned long csa;
+
+	ddr2_conf(&ddr2);
+
+	/* enable DDR2 clock */
+	writel(0x4, &pmc->scer);
+
+	/* Chip select 1 is for DDR2/SDRAM */
+	csa = readl(&matrix->ebicsa);
+	csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
+	csa &= ~AT91_MATRIX_EBI_DBPU_OFF;
+	csa |= AT91_MATRIX_EBI_DBPD_OFF;
+	csa |= AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
+	writel(csa, &matrix->ebicsa);
+
+	/* DDRAM2 Controller initialize */
+	ddr2_init(ATMEL_BASE_CS1, &ddr2);
+}
+#endif

board/atmel/at91sam9x5ek/at91sam9x5ek.c

@@ -293,3 +293,77 @@ int dram_init(void)
 					CONFIG_SYS_SDRAM_SIZE);
 	return 0;
 }
+
+#if defined(CONFIG_SPL_BUILD)
+#include <spl.h>
+#include <nand.h>
+
+void at91_spl_board_init(void)
+{
+#ifdef CONFIG_SYS_USE_MMC
+	at91_mci_hw_init();
+#elif CONFIG_SYS_USE_NANDFLASH
+	at91sam9x5ek_nand_hw_init();
+#elif CONFIG_SYS_USE_SPIFLASH
+	at91_spi0_hw_init(1 << 4);
+#endif
+}
+
+#include <asm/arch/atmel_mpddrc.h>
+static void ddr2_conf(struct atmel_mpddr *ddr2)
+{
+	ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
+
+	ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
+		    ATMEL_MPDDRC_CR_NR_ROW_13 |
+		    ATMEL_MPDDRC_CR_CAS_DDR_CAS3 |
+		    ATMEL_MPDDRC_CR_NB_8BANKS |
+		    ATMEL_MPDDRC_CR_DECOD_INTERLEAVED);
+
+	ddr2->rtr = 0x411;
+
+	ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET |
+		      8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET);
+
+	ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET |
+		      200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET |
+		      19 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET |
+		      18 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET);
+
+	ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET |
+		      3 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET |
+		      7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET |
+		      2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
+}
+
+void mem_init(void)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+	struct atmel_mpddr ddr2;
+	unsigned long csa;
+
+	ddr2_conf(&ddr2);
+
+	/* enable DDR2 clock */
+	writel(0x4, &pmc->scer);
+
+	/* Chip select 1 is for DDR2/SDRAM */
+	csa = readl(&matrix->ebicsa);
+	csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
+	csa &= ~AT91_MATRIX_EBI_DBPU_OFF;
+	csa |= AT91_MATRIX_EBI_DBPD_OFF;
+	csa |= AT91_MATRIX_EBI_EBI_IOSR_NORMAL;
+	writel(csa, &matrix->ebicsa);
+
+	/* DDRAM2 Controller initialize */
+	ddr2_init(ATMEL_BASE_CS1, &ddr2);
+}
+#endif

board/atmel/sama5d4_xplained/sama5d4_xplained.c

@@ -24,6 +24,7 @@
 #include <netdev.h>
 #include <nand.h>
 #include <spi.h>
+#include <version.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -179,6 +180,7 @@ void lcd_show_board_info(void)
 	int i;
 	char temp[32];
 
+	lcd_printf("%s\n", U_BOOT_VERSION);
 	lcd_printf("2014 ATMEL Corp\n");
 	lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
 		   strmhz(temp, get_cpu_clk_rate()));

board/atmel/sama5d4ek/sama5d4ek.c

@@ -24,6 +24,7 @@
 #include <netdev.h>
 #include <nand.h>
 #include <spi.h>
+#include <version.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -174,6 +175,7 @@ void lcd_show_board_info(void)
 	int i;
 	char temp[32];
 
+	lcd_printf("%s\n", U_BOOT_VERSION);
 	lcd_printf("2014 ATMEL Corp\n");
 	lcd_printf("at91@atmel.com\n");
 	lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),

configs/at91sam9m10g45ek_mmc_defconfig

@@ -1,3 +1,4 @@
+CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC"
 CONFIG_ARM=y
 CONFIG_ARCH_AT91=y

configs/at91sam9m10g45ek_nandflash_defconfig

@@ -1,3 +1,4 @@
+CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH"
 CONFIG_ARM=y
 CONFIG_ARCH_AT91=y

configs/at91sam9n12ek_nandflash_defconfig

@@ -1,3 +1,4 @@
+CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_NANDFLASH"
 CONFIG_ARM=y
 CONFIG_ARCH_AT91=y

configs/at91sam9n12ek_spiflash_defconfig

@@ -1,3 +1,4 @@
+CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_SPIFLASH"
 CONFIG_ARM=y
 CONFIG_ARCH_AT91=y

configs/at91sam9x5ek_nandflash_defconfig

@@ -1,3 +1,4 @@
+CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH"
 CONFIG_ARM=y
 CONFIG_ARCH_AT91=y

configs/at91sam9x5ek_spiflash_defconfig

@@ -1,3 +1,4 @@
+CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_SPIFLASH"
 CONFIG_ARM=y
 CONFIG_ARCH_AT91=y

configs/corvus_defconfig

@@ -1,5 +1,5 @@
 CONFIG_SPL=y
-CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH"
 CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_CORVUS=y

drivers/mtd/nand/atmel_nand.c

@@ -1456,6 +1456,9 @@ int board_nand_init(struct nand_chip *nand)
 	nand->dev_ready = at91_nand_wait_ready;
 #endif
 	nand->chip_delay = 20;
+#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
+	nand->bbt_options |= NAND_BBT_USE_FLASH;
+#endif
 
 #ifdef CONFIG_ATMEL_NAND_HWECC
 #ifdef CONFIG_ATMEL_NAND_HW_PMECC
@@ -1522,6 +1525,9 @@ int atmel_nand_chip_init(int devnum, ulong base_addr)
 	nand->dev_ready = at91_nand_ready;
 #endif
 	nand->chip_delay = 75;
+#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
+	nand->bbt_options |= NAND_BBT_USE_FLASH;
+#endif
 
 	ret = nand_scan_ident(mtd, CONFIG_SYS_NAND_MAX_CHIPS, NULL);
 	if (ret)

include/configs/at91-sama5_common.h

@@ -0,0 +1,87 @@
+/*
+ * Common part of configuration settings for the AT91 SAMA5 board.
+ *
+ * Copyright (C) 2015 Atmel Corporation
+ *		      Josh Wu <josh.wu@atmel.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __AT91_SAMA5_COMMON_H
+#define __AT91_SAMA5_COMMON_H
+
+#include <asm/hardware.h>
+
+#define CONFIG_SYS_TEXT_BASE		0x26f00000
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
+#define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
+
+#define CONFIG_ARCH_CPU_INIT
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_DISPLAY_CPUINFO
+
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_OF_LIBFDT		/* Device Tree support */
+
+#define CONFIG_SYS_GENERIC_BOARD
+
+/* general purpose I/O */
+#define CONFIG_AT91_GPIO
+
+#define CONFIG_BOOTDELAY		3
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMI
+#undef CONFIG_CMD_LOADS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_SETEXPR
+
+#ifdef CONFIG_SYS_USE_MMC
+#define CONFIG_BOOTARGS							\
+	"console=ttyS0,115200 earlyprintk "				\
+	"root=/dev/mmcblk0p2 rw rootwait"
+#else
+#define CONFIG_BOOTARGS							\
+	"console=ttyS0,115200 earlyprintk "				\
+	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
+	"256K(env),256k(evn_redundent),256k(spare),"			\
+	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
+	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
+#endif
+
+#define CONFIG_BAUDRATE			115200
+
+#define CONFIG_SYS_PROMPT		"U-Boot> "
+#define CONFIG_SYS_CBSIZE		256
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_HUSH_PARSER
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
+
+#endif

include/configs/at91sam9m10g45ek.h

@@ -203,4 +203,62 @@
  */
 #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
 
+/* Defines for SPL */
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE		0x300000
+#define CONFIG_SPL_MAX_SIZE		0x010000
+#define CONFIG_SPL_STACK		0x310000
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+
+#define CONFIG_SYS_MONITOR_LEN		0x80000
+
+#ifdef CONFIG_SYS_USE_MMC
+
+#define CONFIG_SPL_BSS_START_ADDR	0x70000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x00080000
+#define CONFIG_SYS_SPL_MALLOC_START	0x70080000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00080000
+
+#define CONFIG_SPL_LDSCRIPT		arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x400
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
+#define CONFIG_SPL_FAT_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+
+#elif CONFIG_SYS_USE_NANDFLASH
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_ECC
+#define CONFIG_SPL_NAND_SOFTECC
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x80000
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+
+#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
+#define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCSIZE		256
+#define CONFIG_SYS_NAND_ECCBYTES	3
+#define CONFIG_SYS_NAND_OOBSIZE		64
+#define CONFIG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
+					  48, 49, 50, 51, 52, 53, 54, 55, \
+					  56, 57, 58, 59, 60, 61, 62, 63, }
+#endif
+
+#define CONFIG_SPL_ATMEL_SIZE
+#define CONFIG_SYS_MASTER_CLOCK		132096000
+#define CONFIG_SYS_AT91_PLLA		0x20c73f03
+#define CONFIG_SYS_MCKR			0x1301
+#define CONFIG_SYS_MCKR_CSS		0x1302
+
+#define ATMEL_BASE_MPDDRC		ATMEL_BASE_DDRSDRC0
 #endif

include/configs/at91sam9n12ek.h

@@ -201,11 +201,22 @@
 #else /* CONFIG_SYS_USE_MMC */
 
 /* bootstrap + u-boot + env + linux in mmc */
-#define CONFIG_ENV_IS_IN_MMC
-/* For FAT system, most cases it should be in the reserved sector */
+
+#ifdef CONFIG_ENV_IS_IN_MMC
+/* Use raw reserved sectors to save environment */
 #define CONFIG_ENV_OFFSET		0x2000
 #define CONFIG_ENV_SIZE			0x1000
 #define CONFIG_SYS_MMC_ENV_DEV		0
+#else
+/* Use file in FAT file to save environment */
+#define CONFIG_ENV_IS_IN_FAT
+#define CONFIG_FAT_WRITE
+#define FAT_ENV_INTERFACE		"mmc"
+#define FAT_ENV_FILE			"uboot.env"
+#define FAT_ENV_DEVICE_AND_PART		"0"
+#define CONFIG_ENV_SIZE			0x4000
+#endif
+
 #define CONFIG_BOOTCOMMAND						\
 	"setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};"	\
 	"fatload mmc 0:1 0x21000000 dtb;"				\
@@ -228,6 +239,62 @@
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN	(4 * 1024 * 1024)
-#define CONFIG_STACKSIZE	(32 * 1024)	/* regular stack */
+
+/* SPL */
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE		0x300000
+#define CONFIG_SPL_MAX_SIZE		0x6000
+#define CONFIG_SPL_STACK		0x308000
+
+#define CONFIG_SPL_BSS_START_ADDR	0x20000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000
+#define CONFIG_SYS_SPL_MALLOC_START	0x20080000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SYS_MONITOR_LEN		(512 << 10)
+
+#define CONFIG_SYS_MASTER_CLOCK		132096000
+#define CONFIG_SYS_AT91_PLLA		0x20953f03
+#define CONFIG_SYS_MCKR			0x1301
+#define CONFIG_SYS_MCKR_CSS		0x1302
+
+#define ATMEL_BASE_MPDDRC		ATMEL_BASE_DDRSDRC
+
+#ifdef CONFIG_SYS_USE_MMC
+#define CONFIG_SPL_LDSCRIPT		arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x400
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
+#define CONFIG_SPL_FAT_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+
+#elif CONFIG_SYS_USE_NANDFLASH
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_OOBSIZE		64
+#define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
+#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
+
+#elif CONFIG_SYS_USE_SPIFLASH
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8400
+
+#endif
 
 #endif

include/configs/at91sam9x5ek.h

@@ -243,4 +243,61 @@
  */
 #define CONFIG_SYS_MALLOC_LEN		(512 * 1024 + 0x1000)
 
+/* SPL */
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE		0x300000
+#define CONFIG_SPL_MAX_SIZE		0x6000
+#define CONFIG_SPL_STACK		0x308000
+
+#define CONFIG_SPL_BSS_START_ADDR	0x20000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000
+#define CONFIG_SYS_SPL_MALLOC_START	0x20080000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SYS_MONITOR_LEN		(512 << 10)
+
+#define CONFIG_SYS_MASTER_CLOCK		132096000
+#define CONFIG_SYS_AT91_PLLA		0x20c73f03
+#define CONFIG_SYS_MCKR			0x1301
+#define CONFIG_SYS_MCKR_CSS		0x1302
+
+#define ATMEL_BASE_MPDDRC		ATMEL_BASE_DDRSDRC
+
+#ifdef CONFIG_SYS_USE_MMC
+#define CONFIG_SPL_LDSCRIPT		arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x400
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
+#define CONFIG_SPL_FAT_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+
+#elif CONFIG_SYS_USE_NANDFLASH
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_OOBSIZE		64
+#define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
+#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
+
+#elif CONFIG_SYS_USE_SPIFLASH
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8400
+
+#endif
+
 #endif

include/configs/corvus.h

@@ -16,9 +16,6 @@
 
 #include <asm/hardware.h>
 
-#define MACH_TYPE_CORVUS               2066
-
-#define CONFIG_MACH_TYPE		MACH_TYPE_CORVUS
 #define CONFIG_SYS_GENERIC_BOARD
 /*
  * Warning: changing CONFIG_SYS_TEXT_BASE requires

include/configs/sama5d3_xplained.h

@@ -10,30 +10,10 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/hardware.h>
-
-#define CONFIG_SYS_TEXT_BASE		0x26f00000
-
-/* ARM asynchronous clock */
-#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
-#define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
-
-#define CONFIG_ARCH_CPU_INIT
-
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_DISPLAY_CPUINFO
-
-#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT		/* Device Tree support */
-
-#define CONFIG_SYS_GENERIC_BOARD
+/* No NOR flash, this definition should put before common header */
+#define CONFIG_SYS_NO_FLASH
 
-/* general purpose I/O */
-#define CONFIG_AT91_GPIO
+#include "at91-sama5_common.h"
 
 /* serial console */
 #define CONFIG_ATMEL_USART
@@ -51,29 +31,6 @@
  */
 #define ATMEL_PMC_UHP			AT91SAM926x_PMC_UHP
 
-#define CONFIG_BOOTDELAY		3
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/* No NOR flash */
-#define CONFIG_SYS_NO_FLASH
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_IMI
-#undef CONFIG_CMD_LOADS
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_DHCP
-
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
@@ -181,34 +138,6 @@
 #define CONFIG_ENV_IS_NOWHERE
 #endif
 
-#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_BOOTARGS							\
-	"console=ttyS0,115200 earlyprintk "				\
-	"root=/dev/mmcblk0p2 rw rootwait"
-#else
-#define CONFIG_BOOTARGS							\
-	"console=ttyS0,115200 earlyprintk "				\
-	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
-	"256K(env),256k(evn_redundent),256k(spare),"			\
-	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
-	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
-#endif
-
-#define CONFIG_BAUDRATE			115200
-
-#define CONFIG_SYS_PROMPT		"U-Boot> "
-#define CONFIG_SYS_CBSIZE		256
-#define CONFIG_SYS_MAXARGS		16
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
-					sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_HUSH_PARSER
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
-
 /* SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x300000

include/configs/sama5d3xek.h

@@ -13,30 +13,11 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/hardware.h>
-
-#define CONFIG_SYS_TEXT_BASE		0x26f00000
-
-/* ARM asynchronous clock */
-#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
-#define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
-
-#define CONFIG_ARCH_CPU_INIT
-
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_DISPLAY_CPUINFO
-
-#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT		/* Device Tree support */
-
-#define CONFIG_SYS_GENERIC_BOARD
-
-/* general purpose I/O */
-#define CONFIG_AT91_GPIO
+/*
+ * If has No NOR flash, please put the definition: CONFIG_SYS_NO_FLASH
+ * before the common header.
+ */
+#include "at91-sama5_common.h"
 
 /* serial console */
 #define CONFIG_ATMEL_USART
@@ -69,40 +50,17 @@
 /* board specific (not enough SRAM) */
 #define CONFIG_SAMA5D3_LCD_BASE		0x23E00000
 
-#define CONFIG_BOOTDELAY		3
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
 /* NOR flash */
+#ifndef CONFIG_SYS_NO_FLASH
 #define CONFIG_CMD_FLASH
-
-#ifdef CONFIG_CMD_FLASH
 #define CONFIG_FLASH_CFI_DRIVER
 #define CONFIG_SYS_FLASH_CFI
 #define CONFIG_SYS_FLASH_PROTECTION
 #define CONFIG_SYS_FLASH_BASE		0x10000000
 #define CONFIG_SYS_MAX_FLASH_SECT	131
 #define CONFIG_SYS_MAX_FLASH_BANKS	1
-#else
-#define CONFIG_SYS_NO_FLASH
 #endif
 
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_IMI
-#undef CONFIG_CMD_LOADS
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_DHCP
-
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
@@ -228,34 +186,6 @@
 #define CONFIG_ENV_IS_NOWHERE
 #endif
 
-#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_BOOTARGS							\
-	"console=ttyS0,115200 earlyprintk "				\
-	"root=/dev/mmcblk0p2 rw rootwait"
-#else
-#define CONFIG_BOOTARGS							\
-	"console=ttyS0,115200 earlyprintk "				\
-	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
-	"256K(env),256k(evn_redundent),256k(spare),"			\
-	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
-	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
-#endif
-
-#define CONFIG_BAUDRATE			115200
-
-#define CONFIG_SYS_PROMPT		"U-Boot> "
-#define CONFIG_SYS_CBSIZE		256
-#define CONFIG_SYS_MAXARGS		16
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
-					sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_HUSH_PARSER
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
-
 /* SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x300000

include/configs/sama5d4_xplained.h

@@ -10,59 +10,16 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/hardware.h>
-
-#define CONFIG_SYS_TEXT_BASE		0x26f00000
-
-/* ARM asynchronous clock */
-#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
-#define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
-
-#define CONFIG_ARCH_CPU_INIT
-
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_DISPLAY_CPUINFO
-
-#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT		/* Device Tree support */
-
-#define CONFIG_SYS_GENERIC_BOARD
+/* No NOR flash, this definition should put before common header */
+#define CONFIG_SYS_NO_FLASH
 
-/* general purpose I/O */
-#define CONFIG_AT91_GPIO
+#include "at91-sama5_common.h"
 
 /* serial console */
 #define CONFIG_ATMEL_USART
 #define CONFIG_USART_BASE		ATMEL_BASE_USART3
 #define CONFIG_USART_ID			ATMEL_ID_USART3
 
-#define CONFIG_BOOTDELAY		3
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/* No NOR flash */
-#define CONFIG_SYS_NO_FLASH
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_IMI
-#undef CONFIG_CMD_LOADS
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_SETEXPR
-
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
@@ -199,33 +156,6 @@
 				"bootz 0x22000000 - 0x21000000"
 #endif
 
-#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_BOOTARGS							\
-	"console=ttyS0,115200 earlyprintk "				\
-	"root=/dev/mmcblk0p2 rw rootwait"
-#else
-#define CONFIG_BOOTARGS							\
-	"console=ttyS0,115200 earlyprintk "				\
-	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
-	"256K(env),256k(evn_redundent),256k(spare),"			\
-	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
-	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
-#endif
-
-#define CONFIG_BAUDRATE			115200
-
-#define CONFIG_SYS_PROMPT		"U-Boot> "
-#define CONFIG_SYS_CBSIZE		256
-#define CONFIG_SYS_MAXARGS		16
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
-					sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_HUSH_PARSER
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
 
 
 /* SPL */

include/configs/sama5d4ek.h

@@ -10,59 +10,16 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#include <asm/hardware.h>
-
-#define CONFIG_SYS_TEXT_BASE		0x26f00000
-
-/* ARM asynchronous clock */
-#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
-#define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
-
-#define CONFIG_ARCH_CPU_INIT
-
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#endif
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_DISPLAY_CPUINFO
-
-#define CONFIG_CMD_BOOTZ
-#define CONFIG_OF_LIBFDT		/* Device Tree support */
-
-#define CONFIG_SYS_GENERIC_BOARD
+/* No NOR flash, this definition should put before common header */
+#define CONFIG_SYS_NO_FLASH
 
-/* general purpose I/O */
-#define CONFIG_AT91_GPIO
+#include "at91-sama5_common.h"
 
 /* serial console */
 #define CONFIG_ATMEL_USART
 #define CONFIG_USART_BASE		ATMEL_BASE_USART3
 #define	CONFIG_USART_ID			ATMEL_ID_USART3
 
-#define CONFIG_BOOTDELAY		3
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-/* No NOR flash */
-#define CONFIG_SYS_NO_FLASH
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_IMI
-#undef CONFIG_CMD_LOADS
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_SETEXPR
-
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
@@ -197,35 +154,6 @@
 				"bootz 0x22000000 - 0x21000000"
 #endif
 
-#ifdef CONFIG_SYS_USE_MMC
-#define CONFIG_BOOTARGS							\
-	"console=ttyS0,115200 earlyprintk "				\
-	"root=/dev/mmcblk0p2 rw rootwait"
-#else
-#define CONFIG_BOOTARGS							\
-	"console=ttyS0,115200 earlyprintk "				\
-	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
-	"256K(env),256k(evn_redundent),256k(spare),"			\
-	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
-	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
-#endif
-
-#define CONFIG_BAUDRATE			115200
-
-#define CONFIG_SYS_PROMPT		"U-Boot> "
-#define CONFIG_SYS_CBSIZE		256
-#define CONFIG_SYS_MAXARGS		16
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
-					sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_HUSH_PARSER
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
-
-
 /* SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x200000