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@@ -27,7 +27,6 @@
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#define SD2CKCR 0xE615026C
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#define SD_97500KHZ 0x7
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-#ifdef CONFIG_TPL_BUILD
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struct reg_config {
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u16 off;
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u32 val;
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@@ -45,7 +44,7 @@ static void dbsc_wait(u16 reg)
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;
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}
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-static void tpl_init_sys(void)
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+static void spl_init_sys(void)
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{
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u32 r0 = 0;
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@@ -65,7 +64,7 @@ static void tpl_init_sys(void)
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:"=r"(r0));
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}
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-static void tpl_init_pfc(void)
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+static void spl_init_pfc(void)
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{
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static const struct reg_config pfc_with_unlock[] = {
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{ 0x0090, 0x60000000 },
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@@ -125,7 +124,7 @@ static void tpl_init_pfc(void)
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pfc_base | pfc_without_unlock[i].off);
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}
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-static void tpl_init_gpio(void)
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+static void spl_init_gpio(void)
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{
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static const u16 gpio_offs[] = {
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0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x5400, 0x5800
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@@ -164,7 +163,7 @@ static void tpl_init_gpio(void)
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writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off);
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}
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-static void tpl_init_lbsc(void)
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+static void spl_init_lbsc(void)
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{
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static const struct reg_config lbsc_config[] = {
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{ 0x00, 0x00000020 },
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@@ -192,7 +191,7 @@ static void tpl_init_lbsc(void)
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writel(0, lbsc_base | lbsc_offs[i]);
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}
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-static void tpl_init_dbsc(void)
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+static void spl_init_dbsc(void)
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{
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static const struct reg_config dbsc_config1[] = {
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{ 0x0280, 0x0000a55a },
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@@ -412,7 +411,7 @@ static void tpl_init_dbsc(void)
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}
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-static void tpl_init_qspi(void)
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+static void spl_init_qspi(void)
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{
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mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917);
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@@ -446,14 +445,13 @@ void board_init_f(ulong dummy)
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*/
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writel(SD_97500KHZ, SD2CKCR);
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- tpl_init_sys();
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- tpl_init_pfc();
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- tpl_init_gpio();
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- tpl_init_lbsc();
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- tpl_init_dbsc();
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- tpl_init_qspi();
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+ spl_init_sys();
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+ spl_init_pfc();
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+ spl_init_gpio();
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+ spl_init_lbsc();
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+ spl_init_dbsc();
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+ spl_init_qspi();
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}
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-#endif
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void spl_board_init(void)
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{
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@@ -463,18 +461,17 @@ void spl_board_init(void)
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void board_boot_order(u32 *spl_boot_list)
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{
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-#ifdef CONFIG_TPL_BUILD
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const u32 jtag_magic = 0x1337c0de;
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const u32 load_magic = 0xb33fc0de;
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/*
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* If JTAG probe sets special word at 0xe6300020, then it must
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- * put U-Boot into RAM and TPL will start it from RAM.
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+ * put U-Boot into RAM and SPL will start it from RAM.
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*/
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- if (readl(CONFIG_TPL_TEXT_BASE + 0x20) == jtag_magic) {
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+ if (readl(CONFIG_SPL_TEXT_BASE + 0x20) == jtag_magic) {
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printf("JTAG boot detected!\n");
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- while (readl(CONFIG_TPL_TEXT_BASE + 0x24) != load_magic)
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+ while (readl(CONFIG_SPL_TEXT_BASE + 0x24) != load_magic)
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;
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spl_boot_list[0] = BOOT_DEVICE_RAM;
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@@ -482,7 +479,6 @@ void board_boot_order(u32 *spl_boot_list)
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return;
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}
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-#endif
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/* Boot from SPI NOR with YMODEM UART fallback. */
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spl_boot_list[0] = BOOT_DEVICE_SPI;
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