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@@ -100,11 +100,10 @@ static int waiting_for_cmd_completed(u8 *offset,
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return (i < timeout_msec) ? 0 : -1;
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}
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-static int ahci_setup_oobr(struct ahci_uc_priv *probe_ent,
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- int clk)
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+static int ahci_setup_oobr(struct ahci_uc_priv *uc_priv, int clk)
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{
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struct sata_host_regs *host_mmio =
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- (struct sata_host_regs *)probe_ent->mmio_base;
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+ (struct sata_host_regs *)uc_priv->mmio_base;
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writel(SATA_HOST_OOBR_WE, &(host_mmio->oobr));
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writel(0x02060b14, &(host_mmio->oobr));
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@@ -112,13 +111,13 @@ static int ahci_setup_oobr(struct ahci_uc_priv *probe_ent,
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return 0;
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}
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-static int ahci_host_init(struct ahci_uc_priv *probe_ent)
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+static int ahci_host_init(struct ahci_uc_priv *uc_priv)
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{
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u32 tmp, cap_save, num_ports;
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int i, j, timeout = 1000;
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struct sata_port_regs *port_mmio = NULL;
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struct sata_host_regs *host_mmio =
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- (struct sata_host_regs *)probe_ent->mmio_base;
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+ (struct sata_host_regs *)uc_priv->mmio_base;
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int clk = mxc_get_clock(MXC_SATA_CLK);
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cap_save = readl(&(host_mmio->cap));
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@@ -141,7 +140,7 @@ static int ahci_host_init(struct ahci_uc_priv *probe_ent)
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/* Set timer 1ms */
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writel(clk / 1000, &(host_mmio->timer1ms));
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- ahci_setup_oobr(probe_ent, 0);
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+ ahci_setup_oobr(uc_priv, 0);
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writel_with_flush(SATA_HOST_GHC_AE, &(host_mmio->ghc));
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writel(cap_save, &(host_mmio->cap));
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@@ -155,21 +154,19 @@ static int ahci_host_init(struct ahci_uc_priv *probe_ent)
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* software to determine how many Ports are available and
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* which Port registers need to be initialized.
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*/
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- probe_ent->cap = readl(&(host_mmio->cap));
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- probe_ent->port_map = readl(&(host_mmio->pi));
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+ uc_priv->cap = readl(&(host_mmio->cap));
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+ uc_priv->port_map = readl(&(host_mmio->pi));
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/* Determine how many command slots the HBA supports */
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- probe_ent->n_ports =
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- (probe_ent->cap & SATA_HOST_CAP_NP_MASK) + 1;
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+ uc_priv->n_ports = (uc_priv->cap & SATA_HOST_CAP_NP_MASK) + 1;
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debug("cap 0x%x port_map 0x%x n_ports %d\n",
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- probe_ent->cap, probe_ent->port_map, probe_ent->n_ports);
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+ uc_priv->cap, uc_priv->port_map, uc_priv->n_ports);
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- for (i = 0; i < probe_ent->n_ports; i++) {
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- probe_ent->port[i].port_mmio =
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- ahci_port_base(host_mmio, i);
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+ for (i = 0; i < uc_priv->n_ports; i++) {
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+ uc_priv->port[i].port_mmio = ahci_port_base(host_mmio, i);
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port_mmio =
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- (struct sata_port_regs *)probe_ent->port[i].port_mmio;
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+ (struct sata_port_regs *)uc_priv->port[i].port_mmio;
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/* Ensure that the DWC_ahsata is in idle state */
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tmp = readl(&(port_mmio->cmd));
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@@ -263,7 +260,7 @@ static int ahci_host_init(struct ahci_uc_priv *probe_ent)
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tmp = readl(&(port_mmio->ssts));
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debug("Port %d status: 0x%x\n", i, tmp);
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if ((tmp & SATA_PORT_SSTS_DET_MASK) == 0x03)
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- probe_ent->link_port_map |= (0x01 << i);
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+ uc_priv->link_port_map |= (0x01 << i);
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}
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tmp = readl(&(host_mmio->ghc));
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@@ -275,17 +272,17 @@ static int ahci_host_init(struct ahci_uc_priv *probe_ent)
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return 0;
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}
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-static void ahci_print_info(struct ahci_uc_priv *probe_ent)
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+static void ahci_print_info(struct ahci_uc_priv *uc_priv)
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{
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struct sata_host_regs *host_mmio =
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- (struct sata_host_regs *)probe_ent->mmio_base;
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+ (struct sata_host_regs *)uc_priv->mmio_base;
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u32 vers, cap, impl, speed;
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const char *speed_s;
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const char *scc_s;
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vers = readl(&(host_mmio->vs));
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- cap = probe_ent->cap;
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- impl = probe_ent->port_map;
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+ cap = uc_priv->cap;
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+ impl = uc_priv->port_map;
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speed = (cap & SATA_HOST_CAP_ISS_MASK)
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>> SATA_HOST_CAP_ISS_OFFSET;
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@@ -331,29 +328,29 @@ static void ahci_print_info(struct ahci_uc_priv *probe_ent)
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static int ahci_init_one(int pdev)
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{
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int rc;
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- struct ahci_uc_priv *probe_ent = NULL;
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+ struct ahci_uc_priv *uc_priv = NULL;
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- probe_ent = malloc(sizeof(struct ahci_uc_priv));
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- memset(probe_ent, 0, sizeof(struct ahci_uc_priv));
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- probe_ent->dev = pdev;
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+ uc_priv = malloc(sizeof(struct ahci_uc_priv));
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+ memset(uc_priv, 0, sizeof(struct ahci_uc_priv));
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+ uc_priv->dev = pdev;
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- probe_ent->host_flags = ATA_FLAG_SATA
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+ uc_priv->host_flags = ATA_FLAG_SATA
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| ATA_FLAG_NO_LEGACY
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| ATA_FLAG_MMIO
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| ATA_FLAG_PIO_DMA
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| ATA_FLAG_NO_ATAPI;
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- probe_ent->mmio_base = (void __iomem *)CONFIG_DWC_AHSATA_BASE_ADDR;
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+ uc_priv->mmio_base = (void __iomem *)CONFIG_DWC_AHSATA_BASE_ADDR;
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/* initialize adapter */
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- rc = ahci_host_init(probe_ent);
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+ rc = ahci_host_init(uc_priv);
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if (rc)
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goto err_out;
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- ahci_print_info(probe_ent);
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+ ahci_print_info(uc_priv);
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- /* Save the private struct to block device struct */
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- sata_dev_desc[pdev].priv = (void *)probe_ent;
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+ /* Save the uc_private struct to block device struct */
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+ sata_dev_desc[pdev].priv = (void *)uc_priv;
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return 0;
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@@ -361,10 +358,10 @@ err_out:
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return rc;
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}
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-static int ahci_fill_sg(struct ahci_uc_priv *probe_ent,
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- u8 port, unsigned char *buf, int buf_len)
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+static int ahci_fill_sg(struct ahci_uc_priv *uc_priv, u8 port,
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+ unsigned char *buf, int buf_len)
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{
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- struct ahci_ioports *pp = &(probe_ent->port[port]);
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+ struct ahci_ioports *pp = &(uc_priv->port[port]);
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struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
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u32 sg_count, max_bytes;
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int i;
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@@ -408,11 +405,11 @@ static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 cmd_slot, u32 opts)
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#define AHCI_GET_CMD_SLOT(c) ((c) ? ffs(c) : 0)
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-static int ahci_exec_ata_cmd(struct ahci_uc_priv *probe_ent,
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- u8 port, struct sata_fis_h2d *cfis,
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- u8 *buf, u32 buf_len, s32 is_write)
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+static int ahci_exec_ata_cmd(struct ahci_uc_priv *uc_priv, u8 port,
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+ struct sata_fis_h2d *cfis, u8 *buf, u32 buf_len,
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+ s32 is_write)
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{
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- struct ahci_ioports *pp = &(probe_ent->port[port]);
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+ struct ahci_ioports *pp = &(uc_priv->port[port]);
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struct sata_port_regs *port_mmio =
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(struct sata_port_regs *)pp->port_mmio;
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u32 opts;
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@@ -433,7 +430,7 @@ static int ahci_exec_ata_cmd(struct ahci_uc_priv *probe_ent,
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memcpy((u8 *)(pp->cmd_tbl), cfis, sizeof(struct sata_fis_h2d));
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if (buf && buf_len)
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- sg_count = ahci_fill_sg(probe_ent, port, buf, buf_len);
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+ sg_count = ahci_fill_sg(uc_priv, port, buf, buf_len);
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opts = (sizeof(struct sata_fis_h2d) >> 2) | (sg_count << 16);
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if (is_write) {
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opts |= 0x40;
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@@ -461,7 +458,7 @@ static int ahci_exec_ata_cmd(struct ahci_uc_priv *probe_ent,
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static void ahci_set_feature(u8 dev, u8 port)
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{
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- struct ahci_uc_priv *probe_ent =
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+ struct ahci_uc_priv *uc_priv =
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(struct ahci_uc_priv *)sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
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struct sata_fis_h2d *cfis = &h2d;
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@@ -471,15 +468,14 @@ static void ahci_set_feature(u8 dev, u8 port)
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cfis->pm_port_c = 1 << 7;
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cfis->command = ATA_CMD_SET_FEATURES;
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cfis->features = SETFEATURES_XFER;
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- cfis->sector_count = ffs(probe_ent->udma_mask + 1) + 0x3e;
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+ cfis->sector_count = ffs(uc_priv->udma_mask + 1) + 0x3e;
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- ahci_exec_ata_cmd(probe_ent, port, cfis, NULL, 0, READ_CMD);
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+ ahci_exec_ata_cmd(uc_priv, port, cfis, NULL, 0, READ_CMD);
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}
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-static int ahci_port_start(struct ahci_uc_priv *probe_ent,
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- u8 port)
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+static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port)
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{
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- struct ahci_ioports *pp = &(probe_ent->port[port]);
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+ struct ahci_ioports *pp = &(uc_priv->port[port]);
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struct sata_port_regs *port_mmio =
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(struct sata_port_regs *)pp->port_mmio;
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u32 port_status;
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@@ -574,11 +570,11 @@ static void dwc_ahsata_print_info(int dev)
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static void dwc_ahsata_identify(int dev, u16 *id)
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{
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- struct ahci_uc_priv *probe_ent =
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+ struct ahci_uc_priv *uc_priv =
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(struct ahci_uc_priv *)sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
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struct sata_fis_h2d *cfis = &h2d;
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- u8 port = probe_ent->hard_port_no;
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+ u8 port = uc_priv->hard_port_no;
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memset(cfis, 0, sizeof(struct sata_fis_h2d));
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@@ -586,30 +582,29 @@ static void dwc_ahsata_identify(int dev, u16 *id)
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cfis->pm_port_c = 0x80; /* is command */
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cfis->command = ATA_CMD_ID_ATA;
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- ahci_exec_ata_cmd(probe_ent, port, cfis,
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- (u8 *)id, ATA_ID_WORDS * 2, READ_CMD);
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+ ahci_exec_ata_cmd(uc_priv, port, cfis, (u8 *)id, ATA_ID_WORDS * 2,
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+ READ_CMD);
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ata_swap_buf_le16(id, ATA_ID_WORDS);
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}
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static void dwc_ahsata_xfer_mode(int dev, u16 *id)
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{
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- struct ahci_uc_priv *probe_ent =
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+ struct ahci_uc_priv *uc_priv =
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(struct ahci_uc_priv *)sata_dev_desc[dev].priv;
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- probe_ent->pio_mask = id[ATA_ID_PIO_MODES];
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- probe_ent->udma_mask = id[ATA_ID_UDMA_MODES];
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- debug("pio %04x, udma %04x\n\r",
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- probe_ent->pio_mask, probe_ent->udma_mask);
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+ uc_priv->pio_mask = id[ATA_ID_PIO_MODES];
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+ uc_priv->udma_mask = id[ATA_ID_UDMA_MODES];
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+ debug("pio %04x, udma %04x\n\r", uc_priv->pio_mask, uc_priv->udma_mask);
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}
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static u32 dwc_ahsata_rw_cmd(int dev, u32 start, u32 blkcnt,
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u8 *buffer, int is_write)
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{
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- struct ahci_uc_priv *probe_ent =
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+ struct ahci_uc_priv *uc_priv =
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(struct ahci_uc_priv *)sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
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struct sata_fis_h2d *cfis = &h2d;
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- u8 port = probe_ent->hard_port_no;
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+ u8 port = uc_priv->hard_port_no;
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u32 block;
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block = start;
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@@ -627,8 +622,8 @@ static u32 dwc_ahsata_rw_cmd(int dev, u32 start, u32 blkcnt,
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cfis->lba_low = block & 0xff;
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cfis->sector_count = (u8)(blkcnt & 0xff);
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- if (ahci_exec_ata_cmd(probe_ent, port, cfis,
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- buffer, ATA_SECT_SIZE * blkcnt, is_write) > 0)
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+ if (ahci_exec_ata_cmd(uc_priv, port, cfis, buffer,
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+ ATA_SECT_SIZE * blkcnt, is_write) > 0)
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return blkcnt;
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else
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return 0;
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@@ -636,11 +631,11 @@ static u32 dwc_ahsata_rw_cmd(int dev, u32 start, u32 blkcnt,
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static void dwc_ahsata_flush_cache(int dev)
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{
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- struct ahci_uc_priv *probe_ent =
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+ struct ahci_uc_priv *uc_priv =
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(struct ahci_uc_priv *)sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
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struct sata_fis_h2d *cfis = &h2d;
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- u8 port = probe_ent->hard_port_no;
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+ u8 port = uc_priv->hard_port_no;
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memset(cfis, 0, sizeof(struct sata_fis_h2d));
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@@ -648,17 +643,17 @@ static void dwc_ahsata_flush_cache(int dev)
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cfis->pm_port_c = 0x80; /* is command */
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cfis->command = ATA_CMD_FLUSH;
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- ahci_exec_ata_cmd(probe_ent, port, cfis, NULL, 0, 0);
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+ ahci_exec_ata_cmd(uc_priv, port, cfis, NULL, 0, 0);
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}
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static u32 dwc_ahsata_rw_cmd_ext(int dev, u32 start, lbaint_t blkcnt,
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u8 *buffer, int is_write)
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{
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- struct ahci_uc_priv *probe_ent =
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+ struct ahci_uc_priv *uc_priv =
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(struct ahci_uc_priv *)sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
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struct sata_fis_h2d *cfis = &h2d;
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- u8 port = probe_ent->hard_port_no;
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+ u8 port = uc_priv->hard_port_no;
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u64 block;
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block = (u64)start;
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@@ -681,8 +676,8 @@ static u32 dwc_ahsata_rw_cmd_ext(int dev, u32 start, lbaint_t blkcnt,
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cfis->sector_count_exp = (blkcnt >> 8) & 0xff;
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cfis->sector_count = blkcnt & 0xff;
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- if (ahci_exec_ata_cmd(probe_ent, port, cfis, buffer,
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- ATA_SECT_SIZE * blkcnt, is_write) > 0)
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+ if (ahci_exec_ata_cmd(uc_priv, port, cfis, buffer,
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+ ATA_SECT_SIZE * blkcnt, is_write) > 0)
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return blkcnt;
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else
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return 0;
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@@ -690,11 +685,11 @@ static u32 dwc_ahsata_rw_cmd_ext(int dev, u32 start, lbaint_t blkcnt,
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static void dwc_ahsata_flush_cache_ext(int dev)
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{
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- struct ahci_uc_priv *probe_ent =
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+ struct ahci_uc_priv *uc_priv =
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(struct ahci_uc_priv *)sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d __aligned(ARCH_DMA_MINALIGN);
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struct sata_fis_h2d *cfis = &h2d;
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- u8 port = probe_ent->hard_port_no;
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+ u8 port = uc_priv->hard_port_no;
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memset(cfis, 0, sizeof(struct sata_fis_h2d));
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@@ -702,20 +697,20 @@ static void dwc_ahsata_flush_cache_ext(int dev)
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cfis->pm_port_c = 0x80; /* is command */
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cfis->command = ATA_CMD_FLUSH_EXT;
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- ahci_exec_ata_cmd(probe_ent, port, cfis, NULL, 0, 0);
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+ ahci_exec_ata_cmd(uc_priv, port, cfis, NULL, 0, 0);
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}
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static void dwc_ahsata_init_wcache(int dev, u16 *id)
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{
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- struct ahci_uc_priv *probe_ent =
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+ struct ahci_uc_priv *uc_priv =
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(struct ahci_uc_priv *)sata_dev_desc[dev].priv;
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|
|
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if (ata_id_has_wcache(id) && ata_id_wcache_enabled(id))
|
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- probe_ent->flags |= SATA_FLAG_WCACHE;
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+ uc_priv->flags |= SATA_FLAG_WCACHE;
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if (ata_id_has_flush(id))
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- probe_ent->flags |= SATA_FLAG_FLUSH;
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+ uc_priv->flags |= SATA_FLAG_FLUSH;
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if (ata_id_has_flush_ext(id))
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- probe_ent->flags |= SATA_FLAG_FLUSH_EXT;
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+ uc_priv->flags |= SATA_FLAG_FLUSH_EXT;
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}
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static u32 ata_low_level_rw_lba48(int dev, u32 blknr, lbaint_t blkcnt,
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@@ -789,7 +784,7 @@ int init_sata(int dev)
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{
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int i;
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u32 linkmap;
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- struct ahci_uc_priv *probe_ent = NULL;
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+ struct ahci_uc_priv *uc_priv = NULL;
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#if defined(CONFIG_MX6)
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if (!is_mx6dq() && !is_mx6dqp())
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@@ -802,21 +797,21 @@ int init_sata(int dev)
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ahci_init_one(dev);
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|
|
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- probe_ent = (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
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- linkmap = probe_ent->link_port_map;
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+ uc_priv = (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
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+ linkmap = uc_priv->link_port_map;
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|
|
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|
if (0 == linkmap) {
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|
printf("No port device detected!\n");
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|
return 1;
|
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|
}
|
|
|
|
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|
- for (i = 0; i < probe_ent->n_ports; i++) {
|
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|
+ for (i = 0; i < uc_priv->n_ports; i++) {
|
|
|
if ((linkmap >> i) && ((linkmap >> i) & 0x01)) {
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- if (ahci_port_start(probe_ent, (u8)i)) {
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|
+ if (ahci_port_start(uc_priv, (u8)i)) {
|
|
|
printf("Can not start port %d\n", i);
|
|
|
return 1;
|
|
|
}
|
|
|
- probe_ent->hard_port_no = i;
|
|
|
+ uc_priv->hard_port_no = i;
|
|
|
break;
|
|
|
}
|
|
|
}
|
|
@@ -826,7 +821,7 @@ int init_sata(int dev)
|
|
|
|
|
|
int reset_sata(int dev)
|
|
|
{
|
|
|
- struct ahci_uc_priv *probe_ent;
|
|
|
+ struct ahci_uc_priv *uc_priv;
|
|
|
struct sata_host_regs *host_mmio;
|
|
|
|
|
|
if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) {
|
|
@@ -834,12 +829,12 @@ int reset_sata(int dev)
|
|
|
return -1;
|
|
|
}
|
|
|
|
|
|
- probe_ent = (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
|
|
|
- if (NULL == probe_ent)
|
|
|
+ uc_priv = (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
|
|
|
+ if (NULL == uc_priv)
|
|
|
/* not initialized, so nothing to reset */
|
|
|
return 0;
|
|
|
|
|
|
- host_mmio = (struct sata_host_regs *)probe_ent->mmio_base;
|
|
|
+ host_mmio = (struct sata_host_regs *)uc_priv->mmio_base;
|
|
|
setbits_le32(&host_mmio->ghc, SATA_HOST_GHC_HR);
|
|
|
while (readl(&host_mmio->ghc) & SATA_HOST_GHC_HR)
|
|
|
udelay(100);
|
|
@@ -850,7 +845,7 @@ int reset_sata(int dev)
|
|
|
int sata_port_status(int dev, int port)
|
|
|
{
|
|
|
struct sata_port_regs *port_mmio;
|
|
|
- struct ahci_uc_priv *probe_ent = NULL;
|
|
|
+ struct ahci_uc_priv *uc_priv = NULL;
|
|
|
|
|
|
if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1))
|
|
|
return -EINVAL;
|
|
@@ -858,8 +853,8 @@ int sata_port_status(int dev, int port)
|
|
|
if (sata_dev_desc[dev].priv == NULL)
|
|
|
return -ENODEV;
|
|
|
|
|
|
- probe_ent = (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
|
|
|
- port_mmio = (struct sata_port_regs *)probe_ent->port[port].port_mmio;
|
|
|
+ uc_priv = (struct ahci_uc_priv *)sata_dev_desc[dev].priv;
|
|
|
+ port_mmio = (struct sata_port_regs *)uc_priv->port[port].port_mmio;
|
|
|
|
|
|
return readl(&(port_mmio->ssts)) & SATA_PORT_SSTS_DET_MASK;
|
|
|
}
|
|
@@ -883,9 +878,9 @@ ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)
|
|
|
ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)
|
|
|
{
|
|
|
u32 rc;
|
|
|
- struct ahci_uc_priv *probe_ent =
|
|
|
+ struct ahci_uc_priv *uc_priv =
|
|
|
(struct ahci_uc_priv *)sata_dev_desc[dev].priv;
|
|
|
- u32 flags = probe_ent->flags;
|
|
|
+ u32 flags = uc_priv->flags;
|
|
|
|
|
|
if (sata_dev_desc[dev].lba48) {
|
|
|
rc = ata_low_level_rw_lba48(dev, blknr, blkcnt,
|
|
@@ -910,9 +905,9 @@ int scan_sata(int dev)
|
|
|
u8 product[ATA_ID_PROD_LEN + 1] = { 0 };
|
|
|
u16 *id;
|
|
|
u64 n_sectors;
|
|
|
- struct ahci_uc_priv *probe_ent =
|
|
|
+ struct ahci_uc_priv *uc_priv =
|
|
|
(struct ahci_uc_priv *)sata_dev_desc[dev].priv;
|
|
|
- u8 port = probe_ent->hard_port_no;
|
|
|
+ u8 port = uc_priv->hard_port_no;
|
|
|
struct blk_desc *pdev = &(sata_dev_desc[dev]);
|
|
|
|
|
|
id = (u16 *)memalign(ARCH_DMA_MINALIGN,
|
|
@@ -953,8 +948,8 @@ int scan_sata(int dev)
|
|
|
}
|
|
|
|
|
|
/* Get the NCQ queue depth from device */
|
|
|
- probe_ent->flags &= (~SATA_FLAG_Q_DEP_MASK);
|
|
|
- probe_ent->flags |= ata_id_queue_depth(id);
|
|
|
+ uc_priv->flags &= (~SATA_FLAG_Q_DEP_MASK);
|
|
|
+ uc_priv->flags |= ata_id_queue_depth(id);
|
|
|
|
|
|
/* Get the xfer mode from device */
|
|
|
dwc_ahsata_xfer_mode(dev, id);
|