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@@ -14,6 +14,7 @@
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#define HB_AHCI_BASE 0xffe08000
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+#define HB_SCU_A9_PWR_STATUS 0xfff10008
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#define HB_SREG_A9_PWR_REQ 0xfff3cf00
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#define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04
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#define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20
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@@ -27,6 +28,10 @@
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#define PWRDOM_STAT_PCI 0x40000000
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#define PWRDOM_STAT_EMMC 0x20000000
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+#define HB_SCU_A9_PWR_NORMAL 0
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+#define HB_SCU_A9_PWR_DORMANT 2
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+#define HB_SCU_A9_PWR_OFF 3
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+
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DECLARE_GLOBAL_DATA_PTR;
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/*
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@@ -114,6 +119,7 @@ int ft_board_setup(void *fdt, bd_t *bd)
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void reset_cpu(ulong addr)
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{
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writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
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+ writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS);
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wfi();
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}
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