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@@ -148,18 +148,12 @@ static void spl_ram_load_image(void)
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}
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#endif
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-void board_init_r(gd_t *dummy1, ulong dummy2)
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+int spl_init(void)
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{
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- u32 boot_device;
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int ret;
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- debug(">>spl:board_init_r()\n");
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-
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-#if defined(CONFIG_SYS_SPL_MALLOC_START)
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- mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
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- CONFIG_SYS_SPL_MALLOC_SIZE);
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- gd->flags |= GD_FLG_FULL_MALLOC_INIT;
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-#elif defined(CONFIG_SYS_MALLOC_F_LEN)
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+ debug("spl_init()\n");
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+#if defined(CONFIG_SYS_MALLOC_F_LEN)
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gd->malloc_limit = CONFIG_SYS_MALLOC_F_LEN;
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gd->malloc_ptr = 0;
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#endif
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@@ -168,17 +162,36 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
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ret = fdtdec_setup();
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if (ret) {
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debug("fdtdec_setup() returned error %d\n", ret);
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- hang();
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+ return ret;
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}
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}
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if (IS_ENABLED(CONFIG_SPL_DM)) {
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ret = dm_init_and_scan(true);
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if (ret) {
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debug("dm_init_and_scan() returned error %d\n", ret);
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- hang();
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+ return ret;
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}
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}
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+ gd->flags |= GD_FLG_SPL_INIT;
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+
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+ return 0;
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+}
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+void board_init_r(gd_t *dummy1, ulong dummy2)
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+{
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+ u32 boot_device;
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+
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+ debug(">>spl:board_init_r()\n");
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+
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+#if defined(CONFIG_SYS_SPL_MALLOC_START)
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+ mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
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+ CONFIG_SYS_SPL_MALLOC_SIZE);
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+ gd->flags |= GD_FLG_FULL_MALLOC_INIT;
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+#endif
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+ if (!(gd->flags & GD_FLG_SPL_INIT)) {
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+ if (spl_init())
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+ hang();
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+ }
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#ifndef CONFIG_PPC
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/*
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* timer_init() does not exist on PPC systems. The timer is initialized
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