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@@ -0,0 +1,1068 @@
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+/*
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+ * Allwinner Technology CO., Ltd. sun50iw10p1 soc board.
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+ *
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+ * soc board support.
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+ */
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+ #include <media_bus_format.h>
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+
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+/{
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+ edp_panel_backlight: edp_backlight {
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+ compatible = "pwm-backlight";
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+ status = "okay";
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+ brightness-levels = <
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+ 0 1 2 3 4 5 6 7
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+ 8 9 10 11 12 13 14 15
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+ 16 17 18 19 20 21 22 23
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+ 24 25 26 27 28 29 30 31
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+ 32 33 34 35 36 37 38 39
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+ 40 41 42 43 44 45 46 47
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+ 48 49 50 51 52 53 54 55
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+ 56 57 58 59 60 61 62 63
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+ 64 65 66 67 68 69 70 71
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+ 72 73 74 75 76 77 78 79
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+ 80 81 82 83 84 85 86 87
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+ 88 89 90 91 92 93 94 95
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+ 96 97 98 99 100 101 102 103
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+ 104 105 106 107 108 109 110 111
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+ 112 113 114 115 116 117 118 119
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+ 120 121 122 123 124 125 126 127
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+ 128 129 130 131 132 133 134 135
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+ 136 137 138 139 140 141 142 143
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+ 144 145 146 147 148 149 150 151
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+ 152 153 154 155 156 157 158 159
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+ 160 161 162 163 164 165 166 167
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+ 168 169 170 171 172 173 174 175
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+ 176 177 178 179 180 181 182 183
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+ 184 185 186 187 188 189 190 191
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+ 192 193 194 195 196 197 198 199
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+ 200 201 202 203 204 205 206 207
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+ 208 209 210 211 212 213 214 215
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+ 216 217 218 219 220 221 222 223
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+ 224 225 226 227 228 229 230 231
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+ 232 233 234 235 236 237 238 239
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+ 240 241 242 243 244 245 246 247
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+ 248 249 250 251 252 253 254 255>;
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+ default-brightness-level = <200>;
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+ enable-gpios = <&pio PI 5 1 0 3 1>;
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+ /* power-supply = <®_backlight_12v>; */
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+ pwms = <&pwm 5 5000000 0>;
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+ };
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+
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+ edp_panel: edp_panel {
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+ compatible = "edp-general-panel";
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+ status = "okay";
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+ //enable1-gpios = <&pio PI 4 1 0 3 1>;
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+ //enable2-gpios = <&pio PI 5 1 0 3 1>;
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+ power0-supply = <®_dcdc4>;
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+ backlight = <&edp_panel_backlight>;
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+
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+ ports {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ panel_in: port@0 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <0>;
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+ edp_panel_in: endpoint@0 {
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+ reg = <0>;
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+ remote-endpoint = <&edp_panel_out>;
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+ };
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+ };
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+ };
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+ };
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+
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+ backlight0: backlight0 {
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+ compatible = "pwm-backlight";
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+ status = "okay";
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+ brightness-levels = <
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+ 0 1 2 3 4 5 6 7
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+ 8 9 10 11 12 13 14 15
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+ 16 17 18 19 20 21 22 23
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+ 24 25 26 27 28 29 30 31
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+ 32 33 34 35 36 37 38 39
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+ 40 41 42 43 44 45 46 47
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+ 48 49 50 51 52 53 54 55
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+ 56 57 58 59 60 61 62 63
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+ 64 65 66 67 68 69 70 71
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+ 72 73 74 75 76 77 78 79
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+ 80 81 82 83 84 85 86 87
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+ 88 89 90 91 92 93 94 95
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+ 96 97 98 99 100 101 102 103
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+ 104 105 106 107 108 109 110 111
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+ 112 113 114 115 116 117 118 119
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+ 120 121 122 123 124 125 126 127
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+ 128 129 130 131 132 133 134 135
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+ 136 137 138 139 140 141 142 143
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+ 144 145 146 147 148 149 150 151
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+ 152 153 154 155 156 157 158 159
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+ 160 161 162 163 164 165 166 167
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+ 168 169 170 171 172 173 174 175
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+ 176 177 178 179 180 181 182 183
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+ 184 185 186 187 188 189 190 191
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+ 192 193 194 195 196 197 198 199
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+ 200 201 202 203 204 205 206 207
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+ 208 209 210 211 212 213 214 215
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+ 216 217 218 219 220 221 222 223
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+ 224 225 226 227 228 229 230 231
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+ 232 233 234 235 236 237 238 239
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+ 240 241 242 243 244 245 246 247
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+ 248 249 250 251 252 253 254 255>;
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+ default-brightness-level = <200>;
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+ enable-gpios = <&pio PI 2 1 0 3 1>;
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+ pwms = <&pwm 4 50000 0>;
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+ };
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+
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+ lvds_panel: lvds_panel@0 {
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+ compatible = "sunxi-lvds";
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+ status = "okay";
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+ reg = <0>;
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+ //power0-supply = <®_cldo3>;
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+ //power1-supply = <®_dcdc4>;
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+ //power2-supply = <®_cldo1>;
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+ backlight = <&backlight0>;
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+ bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_SPWG>;
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+ display-timings {
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+ native-mode = <&lvds_timing0>;
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+ lvds_timing0: timing0 {
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+ clock-frequency = <74871600>;
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+ hback-porch = <70>;
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+ hactive = <1280>;
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+ hfront-porch = <83>;
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+ hsync-len = <18>;
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+ vback-porch = <13>;
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+ vactive = <800>;
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+ vfront-porch = <37>;
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+ vsync-len = <10>;
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+ };
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+ };
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+ port {
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+ lvds_panel_in: endpoint {
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+ remote-endpoint = <&lvds_panel_out>;
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+ };
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+ };
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+ };
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+ rgb_panel1: rgb_panel@1 {
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+ compatible = "sunxi-rgb";
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+ status = "disabled";
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+ reg = <0>;
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+ //power0-supply = <®_cldo3>;
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+ //power1-supply = <®_dcdc4>;
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+ //power2-supply = <®_cldo1>;
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+
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+ backlight = <&edp_panel_backlight>;
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+
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+ display-timings {
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+ native-mode = <&rgb1_timing0>;
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+
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+ rgb1_timing0: timing0 {
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+ clock-frequency = <74871600>;
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+ hback-porch = <35>;
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+ hactive = <1024>;
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+ hfront-porch = <83>;
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+ hsync-len = <161>;
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+ vback-porch = <25>;
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+ vactive = <600>;
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+ vfront-porch = <15>;
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+ vsync-len = <10>;
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+ };
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+ };
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+ port {
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+ rgb1_panel_in: endpoint {
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+ remote-endpoint = <&rgb1_panel_out>;
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+ };
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+ };
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+ };
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+
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+};
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+
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+&sunxi_drm {
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+ route {
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+ disp0_hdmi {
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+ status = "okay";
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+ };
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+ };
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+};
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+
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+&rgb1 {
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+ status = "disabled";
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+ pinctrl-0 = <&rgb24_pins_a>;
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+ pinctrl-1 = <&rgb24_pins_b>;
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+ pinctrl-names = "active","sleep";
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+ ports {
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+ port@1 {
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+ reg = <1>;
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+ rgb1_panel_out: endpoint@0 {
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+ reg = <0>;
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+ remote-endpoint = <&rgb1_panel_in>;
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+ };
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+ };
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+ };
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+};
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+
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+&lvds0 {
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+ status = "disabled";
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+// dual-channel = <0>;
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+ pinctrl-0 = <&lvds0_pins_a>;
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+ pinctrl-1 = <&lvds0_pins_b>;
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+ pinctrl-names = "active","sleep";
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+ ports {
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+ port@1 {
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+ reg = <1>;
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+ lvds_panel_out: endpoint@0 {
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+ reg = <0>;
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+ remote-endpoint = <&lvds_panel_in>;
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+ };
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+ };
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+ };
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+};
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+
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+&dsi0combophy {
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+ status = "disabled";
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+};
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+
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+&dsi1combophy {
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+ status = "disabled";
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+};
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+
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+&dlcd0 {
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+ status = "disabled";
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+};
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+
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+&dlcd1 {
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+ status = "disabled";
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+};
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+
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+&vo0 {
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+ status = "okay";
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+};
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+
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+&vo1 {
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+ status = "disabled";
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+};
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+
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+&tv0 {
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+ status = "okay";
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+};
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+
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+&tv1 {
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+ status = "disabled";
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+};
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+
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+&de {
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+ chn_cfg_mode = <3>;
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+ status = "okay";
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+};
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+
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+&hdmi {
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+ hdmi_used = <1>;
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+ cldo1-supply = <®_cldo1>;
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+ hdmi_power0 = "cldo1";
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+ //vmid-supply = <®_vmid>;
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+ hdmi_power1 = "vmid";
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+ hdmi_power_cnt = <2>;
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+ hdmi_hdcp_enable = <1>;
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+ hdmi_hdcp22_enable = <0>;
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+ hdmi_cts_compatibility = <0>;
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+ hdmi_cec_support = <1>;
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+ hdmi_cec_super_standby = <1>;
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+ hdmi_skip_bootedid = <1>;
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+
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+ ddc_en_io_ctrl = <0>;
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+ power_io_ctrl = <0>;
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+
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+ status = "okay";
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+};
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+
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+&drm_edp {
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+ status = "disabled";
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+
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+ edp_colordepth = <8>; /* 6/8/10/12/16 */
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+ edp_color_fmt = <0>; /* 0:RGB 1: YUV444 2: YUV422 */
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+
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+ vcc-edp-supply = <®_bldo3>;
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+ vdd-edp-supply = <®_dcdc2>;
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+ ports {
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+ edp_out: port@1 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <1>;
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+ edp_panel_out: endpoint@0 {
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+ reg = <0>;
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+ remote-endpoint = <&edp_panel_in>;
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+ };
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+ };
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+ };
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+};
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+
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+&power_sply {
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+ bldo1_vol = <1800>;
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+ bldo2_vol = <1001800>;
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+ bldo3_vol = <1001800>;
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+ cldo2_vol = <1001800>;
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+ cldo4_vol = <1103300>;
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+ dcdc1_mode = <1>;
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+ dcdc3_mode = <1>;
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+ ext_dcdc0_mode = <1>;
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+ ext_dcdc1_mode = <1>;
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+ ext_dcdc2_mode = <1>;
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+ dcdc2_mode = <1>;
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+ bc12_mode = <0>;
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+ ntc_status = <2>;
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+ battery_exist = <0>;
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+};
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+
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+&platform {
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+ eraseflag = <1>;
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+ next_work = <3>;
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+ debug_mode = <1>;
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+};
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+
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+/*
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+ *recovery_key_used : 模块使能端， 1：开启，0：关闭
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+ *press_mode_enable : 长短按模式使能，1：开启，0：关闭
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+ * a)如果开启了该模式，则key_work_mode失效，short_press_mode和long_press_mode生效,
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+ * recovery按键可以通过长按和短按来触发两种不同的模式;
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+ * b)如果关闭了该模式，则key_work_mode生效，recovery按键只能触发一种模式.
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+ *key_work_mode : 模式选择
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+ * 0: 刷机,
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+ * 1: 一键恢复(uboot阶段),
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+ * 2: 安卓recovery,
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+ * 3: 安卓恢复出厂设置.
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+ * 如果不设置，模式为安卓recovery.
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+ *short_press_mode : 长按触发的模式，选项同上.
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+ *long_press_mode : 短按触发的模式，选项同上.
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+ *key_press_time : 定义长按的时间，单位:毫秒.
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+ *recovery_key : 按键配置.
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+ */
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+&adc_boot_recovery {
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+ recovery_adc_used = <0x1>;
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+ recovery_adc_channel = <0x1>;
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+ press_mode_enable = <0x1>;
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+ adc_work_mode = <0x2>;
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+ short_press_mode = <0x0>;
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+ long_press_mode = <0x2>;
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+ key_press_time = <0x1388>;
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+ key_min = <9>;
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+ key_max = <11>;
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+};
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+
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+&target {
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+ boot_clock = <1008>; /*CPU boot frequency, Unit: MHz*/
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+ storage_type = <0xffffffff>; /*boot medium, 0-nand, 1-card0, 2-card2, -1(defualt)auto scan*/
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+ burn_key = <1>; /*1:support burn key; 0:not support burn key*/
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+ dragonboard_test = <0>; /*1:support card boot dragonboard; 0:not support card boot dragonboard*/
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+};
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+
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+&charger0 {
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+ pmu_safe_vol = <3400>;
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+ ntc_cur = <50>;
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+ safe_temp_H = <600>;//60
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+ safe_temp_L = <0xFFFFFFCE>;//-5
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+ pmu_bat_temp_para1 = <4592>;
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+ pmu_bat_temp_para2 = <2781>;
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+ pmu_bat_temp_para3 = <2125>;
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+ pmu_bat_temp_para4 = <1738>;
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+ pmu_bat_temp_para5 = <1390>;
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+ pmu_bat_temp_para6 = <1118>;
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+ pmu_bat_temp_para7 = <906>;
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+ pmu_bat_temp_para8 = <606>;
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+ pmu_bat_temp_para9 = <415>;
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+ pmu_bat_temp_para10 = <290>;
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+ pmu_bat_temp_para11 = <244>;
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+ pmu_bat_temp_para12 = <206>;
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+ pmu_bat_temp_para13 = <175>;
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+ pmu_bat_temp_para14 = <150>;
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+ pmu_bat_temp_para15 = <110>;
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+ pmu_bat_temp_para16 = <83>;
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+};
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+
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+&twi6 {
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+ clock-frequency = <200000>;
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+ pinctrl-0 = <&s_twi0_pins_a>;
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+ pinctrl-1 = <&s_twi0_pins_b>;
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+ twi-supply = <®_aldo3>;
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+ no_suspend = <1>;
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+ twi_drv_used = <1>;
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+ status = "okay";
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+ pmu0: pmu@34 {
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+ compatible = "x-powers,axp2202";
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+ status = "okay";
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+ reg = <0x35>;
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+ /* interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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+ * interrupt-parent = <&gic>; */
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+ x-powers,drive-vbus-en;
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+
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+ wakeup-source;
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+
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+ regulator0: regulators@0 {
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+ reg_dcdc1: dcdc1 {
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+ regulator-name = "axp2202-dcdc1";
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+ };
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+ reg_dcdc2: dcdc2 {
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+ regulator-name = "axp2202-dcdc2";
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+ };
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+ reg_dcdc3: dcdc3 {
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+ regulator-name = "axp2202-dcdc3";
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+ };
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+ reg_dcdc4: dcdc4 {
|
|
|
+ regulator-name = "axp2202-dcdc4";
|
|
|
+ };
|
|
|
+ reg_rtcldo: rtcldo {
|
|
|
+ /* RTC_LDO is a fixed, always-on regulator */
|
|
|
+ regulator-name = "axp2202-rtcldo";
|
|
|
+ };
|
|
|
+ reg_aldo1: aldo1 {
|
|
|
+ regulator-name = "axp2202-aldo1";
|
|
|
+ };
|
|
|
+ reg_aldo2: aldo2 {
|
|
|
+ regulator-name = "axp2202-aldo2";
|
|
|
+ };
|
|
|
+ reg_aldo3: aldo3 {
|
|
|
+ regulator-name = "axp2202-aldo3";
|
|
|
+ };
|
|
|
+ reg_aldo4: aldo4 {
|
|
|
+ regulator-name = "axp2202-aldo4";
|
|
|
+ };
|
|
|
+ reg_bldo1: bldo1 {
|
|
|
+ regulator-name = "axp2202-bldo1";
|
|
|
+ };
|
|
|
+ reg_bldo2: bldo2 {
|
|
|
+ regulator-name = "axp2202-bldo2";
|
|
|
+ };
|
|
|
+ reg_bldo3: bldo3 {
|
|
|
+ regulator-name = "axp2202-bldo3";
|
|
|
+ };
|
|
|
+ reg_bldo4: bldo4 {
|
|
|
+ regulator-name = "axp2202-bldo4";
|
|
|
+ };
|
|
|
+ reg_cldo1: cldo1 {
|
|
|
+ regulator-name = "axp2202-cldo1";
|
|
|
+ };
|
|
|
+ reg_cldo2: cldo2 {
|
|
|
+ regulator-name = "axp2202-cldo2";
|
|
|
+ };
|
|
|
+ reg_cldo4: cldo4 {
|
|
|
+ regulator-name = "axp2202-cldo4";
|
|
|
+ };
|
|
|
+ reg_cpusldo: cpusldo {
|
|
|
+ regulator-name = "axp2202-cpusldo";
|
|
|
+ };
|
|
|
+ };
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+&recovery_key {
|
|
|
+ device_type = "recovery_key";
|
|
|
+ key_max = <11>;
|
|
|
+ key_min = <9>;
|
|
|
+};
|
|
|
+
|
|
|
+&pwm0_pin_a {
|
|
|
+ allwinner,pins = "PD23";
|
|
|
+ allwinner,function = "pwm0";
|
|
|
+ allwinner,drive = <0>;
|
|
|
+ allwinner,muxsel = <0x02>;
|
|
|
+};
|
|
|
+
|
|
|
+&pwm0_pin_b {
|
|
|
+ allwinner,pins = "PD23";
|
|
|
+ allwinner,function = "io_disabled";
|
|
|
+ allwinner,muxsel = <0x0f>;
|
|
|
+ allwinner,drive = <0>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&pwm1_pin_a {
|
|
|
+ allwinner,pins = "PD22";
|
|
|
+ allwinner,function = "pwm1";
|
|
|
+ allwinner,drive = <0>;
|
|
|
+ allwinner,muxsel = <0x02>;
|
|
|
+};
|
|
|
+
|
|
|
+&pwm1_pin_b {
|
|
|
+ allwinner,pins = "PD22";
|
|
|
+ allwinner,function = "io_disabled";
|
|
|
+ allwinner,muxsel = <0x0f>;
|
|
|
+ allwinner,drive = <0>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&pwm2_pin_a {
|
|
|
+ allwinner,pins = "PB11";
|
|
|
+ allwinner,function = "pwm2";
|
|
|
+ allwinner,drive = <0>;
|
|
|
+ allwinner,muxsel = <0x05>;
|
|
|
+};
|
|
|
+
|
|
|
+&pwm2_pin_b {
|
|
|
+ allwinner,pins = "PB11";
|
|
|
+ allwinner,function = "io_disabled";
|
|
|
+ allwinner,muxsel = <0x0f>;
|
|
|
+ allwinner,drive = <0>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&pwm3_pin_a {
|
|
|
+ allwinner,pins = "PB12";
|
|
|
+ allwinner,function = "pwm3";
|
|
|
+ allwinner,drive = <0>;
|
|
|
+ allwinner,muxsel = <0x05>;
|
|
|
+};
|
|
|
+
|
|
|
+&pwm3_pin_b {
|
|
|
+ allwinner,pins = "PB12";
|
|
|
+ allwinner,function = "io_disabled";
|
|
|
+ allwinner,muxsel = <0x0f>;
|
|
|
+ allwinner,drive = <0>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&pwm4_pin_a {
|
|
|
+ allwinner,pins = "PI3";
|
|
|
+ allwinner,function = "pwm4";
|
|
|
+ allwinner,drive = <0>;
|
|
|
+ allwinner,muxsel = <0x04>;
|
|
|
+};
|
|
|
+
|
|
|
+&pwm4_pin_b {
|
|
|
+ allwinner,pins = "PI3";
|
|
|
+ allwinner,function = "io_disabled";
|
|
|
+ allwinner,muxsel = <0x0f>;
|
|
|
+ allwinner,drive = <0>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&pwm5_pin_a {
|
|
|
+ allwinner,pins = "PI4";
|
|
|
+ allwinner,function = "pwm5";
|
|
|
+ allwinner,drive = <0>;
|
|
|
+ allwinner,muxsel = <0x04>;
|
|
|
+};
|
|
|
+
|
|
|
+&pwm5_pin_b {
|
|
|
+ allwinner,pins = "PI4";
|
|
|
+ allwinner,function = "io_disabled";
|
|
|
+ allwinner,muxsel = <0x0f>;
|
|
|
+ allwinner,drive = <0>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&pwm0 {
|
|
|
+ pinctrl-names = "active", "sleep";
|
|
|
+ pinctrl-0 = <&pwm0_pin_a>;
|
|
|
+ pinctrl-1 = <&pwm0_pin_b>;
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&pwm1 {
|
|
|
+ pinctrl-names = "active", "sleep";
|
|
|
+ pinctrl-0 = <&pwm1_pin_a>;
|
|
|
+ pinctrl-1 = <&pwm1_pin_b>;
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&pwm2 {
|
|
|
+ pinctrl-names = "active", "sleep";
|
|
|
+ pinctrl-0 = <&pwm2_pin_a>;
|
|
|
+ pinctrl-1 = <&pwm2_pin_b>;
|
|
|
+ status = "disabled";
|
|
|
+};
|
|
|
+
|
|
|
+&pwm3 {
|
|
|
+ pinctrl-names = "active", "sleep";
|
|
|
+ pinctrl-0 = <&pwm3_pin_a>;
|
|
|
+ pinctrl-1 = <&pwm3_pin_b>;
|
|
|
+ status = "disabled";
|
|
|
+};
|
|
|
+
|
|
|
+&pwm4 {
|
|
|
+ pinctrl-names = "active", "sleep";
|
|
|
+ pinctrl-0 = <&pwm4_pin_a>;
|
|
|
+ pinctrl-1 = <&pwm4_pin_b>;
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&pwm5 {
|
|
|
+ pinctrl-names = "active", "sleep";
|
|
|
+ pinctrl-0 = <&pwm5_pin_a>;
|
|
|
+ pinctrl-1 = <&pwm5_pin_b>;
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&sdc0_pins_a {
|
|
|
+ allwinner,pins = "PF0", "PF1", "PF2",
|
|
|
+ "PF3", "PF4", "PF5";
|
|
|
+ allwinner,function = "sdc0";
|
|
|
+ allwinner,muxsel = <2>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <1>;
|
|
|
+};
|
|
|
+
|
|
|
+&sdc0_pins_b {
|
|
|
+ allwinner,pins = "PF0", "PF1", "PF2",
|
|
|
+ "PF3", "PF4", "PF5";
|
|
|
+ allwinner,function = "io_disabled";
|
|
|
+ allwinner,muxsel = <7>;
|
|
|
+ allwinner,drive = <1>;
|
|
|
+ allwinner,pull = <1>;
|
|
|
+};
|
|
|
+
|
|
|
+&sdc0_pins_c {
|
|
|
+ allwinner,pins = "PF0", "PF1", "PF2",
|
|
|
+ "PF3", "PF4", "PF5";
|
|
|
+ allwinner,function = "uart0_jtag";
|
|
|
+ allwinner,muxsel = <3>;
|
|
|
+ allwinner,drive = <1>;
|
|
|
+ allwinner,pull = <1>;
|
|
|
+};
|
|
|
+
|
|
|
+
|
|
|
+&sdc2_pins_a {
|
|
|
+ allwinner,pins = "PC1", "PC5", "PC6",
|
|
|
+ "PC8", "PC9", "PC10", "PC11",
|
|
|
+ "PC13", "PC14", "PC15", "PC16";
|
|
|
+ allwinner,function = "sdc2";
|
|
|
+ allwinner,muxsel = <3>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <1>;
|
|
|
+};
|
|
|
+
|
|
|
+&sdc2_pins_b {
|
|
|
+ allwinner,pins = "PC0", "PC1", "PC5", "PC6",
|
|
|
+ "PC8", "PC9", "PC10", "PC11",
|
|
|
+ "PC13", "PC14", "PC15", "PC16";
|
|
|
+ allwinner,function = "io_disabled";
|
|
|
+ allwinner,muxsel = <7>;
|
|
|
+ allwinner,drive = <1>;
|
|
|
+ allwinner,pull = <1>;
|
|
|
+};
|
|
|
+
|
|
|
+&sdc2_pins_c {
|
|
|
+ allwinner,pins = "PC0";
|
|
|
+ allwinner,function = "sdc2";
|
|
|
+ allwinner,muxsel = <3>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <2>;
|
|
|
+};
|
|
|
+
|
|
|
+&nand0_pins_a {
|
|
|
+ allwinner,pins = "PC0", "PC1", "PC2", "PC5",
|
|
|
+ "PC8", "PC9", "PC10", "PC11",
|
|
|
+ "PC12", "PC13", "PC14", "PC15",
|
|
|
+ "PC16";
|
|
|
+ allwinner,pname= "nand0_we", "nand0_ale","nand0_cle", "nand0_nre",
|
|
|
+ "nand0_d0", "nand0_d1", "nand0_d2", "nand0_d3",
|
|
|
+ "nand0_d4", "nand0_d5", "nand0_d6", "nand0_d7",
|
|
|
+ "nand0_ndqs";
|
|
|
+ allwinner,function = "nand0";
|
|
|
+ allwinner,muxsel = <2>;
|
|
|
+ allwinner,drive = <1>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&nand0_pins_b {
|
|
|
+ allwinner,pins = "PC4", "PC6", "PC03", "PC07";
|
|
|
+ allwinner,pname= "nand0_ce0", "nand0_rb0", "nand0_ce1", "nand0_rb1";
|
|
|
+ allwinner,function = "nand0";
|
|
|
+ allwinner,muxsel = <2>;
|
|
|
+ allwinner,drive = <1>;
|
|
|
+ allwinner,pull = <1>; /* only RB&CE should be pulled up */
|
|
|
+};
|
|
|
+
|
|
|
+&nand0_pins_c {
|
|
|
+ allwinner,pins = "PC0", "PC1", "PC2", "PC3",
|
|
|
+ "PC4", "PC5", "PC6", "PC7",
|
|
|
+ "PC8", "PC9", "PC10", "PC11",
|
|
|
+ "PC12", "PC13", "PC14", "PC15",
|
|
|
+ "PC16";
|
|
|
+ allwinner,function = "io_disabled";
|
|
|
+ allwinner,muxsel = <7>;
|
|
|
+ allwinner,drive = <1>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&spi0_pins_a {
|
|
|
+ allwinner,pins = "PC12", "PC2", "PC4";
|
|
|
+ allwinner,pname = "spi0_clk", "spi0_mosi", "spi0_miso";
|
|
|
+ allwinner,function = "spi0";
|
|
|
+ allwinner,muxsel = <4>;
|
|
|
+ allwinner,drive = <1>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&spi0_pins_b {
|
|
|
+ allwinner,pins = "PC3", "PC15", "PC16";
|
|
|
+ allwinner,pname = "spi0_cs0", "spi0_wp", "spi0_hold";
|
|
|
+ allwinner,function = "spi0";
|
|
|
+ allwinner,muxsel = <4>;
|
|
|
+ allwinner,drive = <1>;
|
|
|
+ allwinner,pull = <1>; // only CS should be pulled up
|
|
|
+};
|
|
|
+
|
|
|
+&spi0_pins_c {
|
|
|
+ allwinner,pins = "PC12", "PC2", "PC4", "PC3", "PC15", "PC16";
|
|
|
+ allwinner,function = "io_disabled";
|
|
|
+ allwinner,muxsel = <15>;
|
|
|
+ allwinner,drive = <1>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&lvds0_pins_a {
|
|
|
+ allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7";
|
|
|
+ allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7";
|
|
|
+ allwinner,function = "lvds0";
|
|
|
+ allwinner,muxsel = <3>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&lvds0_pins_b {
|
|
|
+ allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7";
|
|
|
+ allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7";
|
|
|
+ allwinner,function = "lvds0_suspend";
|
|
|
+ allwinner,muxsel = <7>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&lvds1_pins_a {
|
|
|
+ allwinner,pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
|
|
|
+ allwinner,pname = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
|
|
|
+ allwinner,function = "lvds1";
|
|
|
+ allwinner,muxsel = <3>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&lvds1_pins_b {
|
|
|
+ allwinner,pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
|
|
|
+ allwinner,pname = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
|
|
|
+ allwinner,function = "lvds1_suspend";
|
|
|
+ allwinner,muxsel = <7>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&lvds2_pins_a {
|
|
|
+ allwinner,pins = "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
|
|
|
+ allwinner,pname = "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
|
|
|
+ allwinner,function = "lvds2";
|
|
|
+ allwinner,muxsel = <3>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&lvds2_pins_b {
|
|
|
+ allwinner,pins = "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
|
|
|
+ allwinner,pname = "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
|
|
|
+ allwinner,function = "lvds2_suspend";
|
|
|
+ allwinner,muxsel = <7>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&lvds3_pins_a {
|
|
|
+ allwinner,pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19";
|
|
|
+ allwinner,pname = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19";
|
|
|
+ allwinner,function = "lvds3";
|
|
|
+ allwinner,muxsel = <3>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&lvds3_pins_b {
|
|
|
+ allwinner,pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19";
|
|
|
+ allwinner,pname = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19";
|
|
|
+ allwinner,function = "lvds3_suspend";
|
|
|
+ allwinner,muxsel = <7>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&lcd1_lvds2link_pins_a {
|
|
|
+ allwinner,pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", \
|
|
|
+ "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
|
|
|
+ allwinner,pname = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", \
|
|
|
+ "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
|
|
|
+ allwinner,function = "lvds3";
|
|
|
+ allwinner,muxsel = <3>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&lcd1_lvds2link_pins_b {
|
|
|
+ allwinner,pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", \
|
|
|
+ "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
|
|
|
+ allwinner,pname = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", \
|
|
|
+ "PJ7", "PJ6", "PJ5", "PJ4", "PJ3", "PJ2", "PJ1", "PJ0", "PJ8", "PJ9";
|
|
|
+ allwinner,function = "lvds3_suspend";
|
|
|
+ allwinner,muxsel = <7>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&lvds2link_pins_a {
|
|
|
+ allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", \
|
|
|
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
|
|
|
+ allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", \
|
|
|
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
|
|
|
+ allwinner,function = "lvds2link";
|
|
|
+ allwinner,muxsel = <3>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&lvds2link_pins_b {
|
|
|
+ allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", \
|
|
|
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
|
|
|
+ allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD8", "PD9", "PD6", "PD7", \
|
|
|
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD16", "PD17";
|
|
|
+ allwinner,function = "lvds2link_suspend";
|
|
|
+ allwinner,muxsel = <7>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&rgb24_pins_a {
|
|
|
+ allwinner,pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", \
|
|
|
+ "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", \
|
|
|
+ "PJ20", "PJ21", "PJ22", "PJ23", "PJ24", "PJ25", "PJ26", "PJ27";
|
|
|
+ allwinner,pname = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", \
|
|
|
+ "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", \
|
|
|
+ "PJ20", "PJ21", "PJ22", "PJ23", "PJ24", "PJ25", "PJ26", "PJ27";
|
|
|
+ allwinner,function = "rgb24";
|
|
|
+ allwinner,muxsel = <2>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&rgb24_pins_b {
|
|
|
+ allwinner,pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", \
|
|
|
+ "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", \
|
|
|
+ "PJ20", "PJ21", "PJ22", "PJ23", "PJ24", "PJ25", "PJ26", "PJ27";
|
|
|
+ allwinner,pname = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9", \
|
|
|
+ "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19", \
|
|
|
+ "PJ20", "PJ21", "PJ22", "PJ23", "PJ24", "PJ25", "PJ26", "PJ27";
|
|
|
+ allwinner,function = "rgb24_suspend";
|
|
|
+ allwinner,muxsel = <7>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&rgb18_pins_a {
|
|
|
+ allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \
|
|
|
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \
|
|
|
+ "PD20", "PD21";
|
|
|
+ allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \
|
|
|
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \
|
|
|
+ "PD20", "PD21";
|
|
|
+ allwinner,function = "rgb18";
|
|
|
+ allwinner,muxsel = <2>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&rgb18_pins_b {
|
|
|
+ allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \
|
|
|
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \
|
|
|
+ "PD20", "PD21";
|
|
|
+ allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \
|
|
|
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \
|
|
|
+ "PD20", "PD21";
|
|
|
+ allwinner,function = "rgb18_suspend";
|
|
|
+ allwinner,muxsel = <7>;
|
|
|
+ allwinner,drive = <1>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&eink_pins_a {
|
|
|
+ allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \
|
|
|
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \
|
|
|
+ "PD20", "PD21", "PD22";
|
|
|
+ allwinner,pname = "eink_pin0", "eink_pin1", "eink_pin2", "eink_pin3", "eink_pin4", \
|
|
|
+ "eink_pin5", "eink_pin6", "eink_pin7", "eink_pin8", "eink_pin9", \
|
|
|
+ "eink_pin10", "eink_pin11", "eink_pin12", "eink_pin13", "eink_pin14", \
|
|
|
+ "eink_pin15", "eink_pinoeh", "eink_pinleh", "eink_pinckh", "eink_pinsth", \
|
|
|
+ "eink_pinckv", "eink_pinmod", "eink_pinstv";
|
|
|
+ allwinner,function = "eink";
|
|
|
+ allwinner,muxsel = <5>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&eink_pins_b {
|
|
|
+ allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \
|
|
|
+ "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \
|
|
|
+ "PD20", "PD21", "PD22";
|
|
|
+ allwinner,pname = "eink_pin0", "eink_pin1", "eink_pin2", "eink_pin3", "eink_pin4", \
|
|
|
+ "eink_pin5", "eink_pin6", "eink_pin7", "eink_pin8", "eink_pin9", \
|
|
|
+ "eink_pin10", "eink_pin11", "eink_pin12", "eink_pin13", "eink_pin14", \
|
|
|
+ "eink_pin15", "eink_pinoeh", "eink_pinleh", "eink_pinckh", "eink_pinsth", \
|
|
|
+ "eink_pinckv", "eink_pinmod", "eink_pinstv";
|
|
|
+ allwinner,function = "eink_suspend";
|
|
|
+ allwinner,muxsel = <7>;
|
|
|
+ allwinner,drive = <1>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&dsi0_4lane_pins_a {
|
|
|
+ allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
|
|
|
+ allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
|
|
|
+ allwinner,function = "dsi4lane";
|
|
|
+ allwinner,muxsel = <4>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&dsi0_4lane_pins_b {
|
|
|
+ allwinner,pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
|
|
|
+ allwinner,pname = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9";
|
|
|
+ allwinner,function = "dsi4lane_suspend";
|
|
|
+ allwinner,muxsel = <7>;
|
|
|
+ allwinner,drive = <1>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&dsi1_4lane_pins_a {
|
|
|
+ allwinner,pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19";
|
|
|
+ allwinner,pname = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19";
|
|
|
+ allwinner,function = "dsi1";
|
|
|
+ allwinner,muxsel = <4>;
|
|
|
+ allwinner,drive = <3>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&dsi1_4lane_pins_b {
|
|
|
+ allwinner,pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19";
|
|
|
+ allwinner,pname = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19";
|
|
|
+ allwinner,function = "io_disabled";
|
|
|
+ allwinner,muxsel = <7>;
|
|
|
+ allwinner,drive = <1>;
|
|
|
+ allwinner,pull = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+
|
|
|
+&card0_boot_para { /* Avoid dtc compiling warnings. @TODO: Developer should modify this to the actual value */
|
|
|
+ /* reg = <0x0 0x2 0x0 0x0>; [> Avoid dtc compiling warnings. @TODO: Developer should modify this to the actual value <] */
|
|
|
+ device_type = "card0_boot_para";
|
|
|
+ card_ctrl = <0x0>;
|
|
|
+ card_high_speed = <0x1>;
|
|
|
+ card_line = <0x4>;
|
|
|
+ clk_mmc = "sdmmc0_mod";
|
|
|
+ pll-0 = "hosc";
|
|
|
+ pll-1 = "pll_periph1_400m";
|
|
|
+ pll-2 = "pll_periph1_300m";
|
|
|
+ pinctrl-0 = <&sdc0_pins_a>;
|
|
|
+};
|
|
|
+
|
|
|
+&card2_boot_para {
|
|
|
+ /*
|
|
|
+ * Avoid dtc compiling warnings.
|
|
|
+ * @TODO: Developer should modify this to the actual value
|
|
|
+ */
|
|
|
+ reg = <0x0 0x3 0x0 0x0>;
|
|
|
+ device_type = "card2_boot_para";
|
|
|
+ card_ctrl = <0x2>;
|
|
|
+ card_high_speed = <0x1>;
|
|
|
+ card_line = <0x8>;
|
|
|
+ clk_mmc = "sdmmc2_mod";
|
|
|
+ pll-0 = "hosc";
|
|
|
+ pll-1 = "pll_periph1_800m";
|
|
|
+ pll-2 = "pll_periph1_600m";
|
|
|
+ pinctrl-0 = <&sdc2_pins_a &sdc2_pins_c>;
|
|
|
+ sdc_ex_dly_used = <0x2>;
|
|
|
+ sdc_tm4_hs200_max_freq = <150>;
|
|
|
+ sdc_tm4_hs400_max_freq = <150>;
|
|
|
+ sdc_io_1v8 = <0x1>;
|
|
|
+ sdc_type = "tm4";
|
|
|
+};
|
|
|
+
|
|
|
+&gpio_bias { /* Avoid dtc compiling warnings. @TODO: Developer should modify this to the actual value */
|
|
|
+ device_type = "gpio_bias";
|
|
|
+ pc_bias = <1800>;
|
|
|
+ pl_supply = "aldo3_vol";
|
|
|
+};
|
|
|
+
|
|
|
+&power_delay {
|
|
|
+ device_type = "power_delay";
|
|
|
+ aldo3_vol_delay = <20000>;
|
|
|
+};
|
|
|
+
|
|
|
+&nand0 {
|
|
|
+ compatible = "allwinner,sun55iw3-nand";
|
|
|
+ device_type = "nand0";
|
|
|
+ //reg = <0x0 0x04011000 0x0 0x1000>;/* nand0 */
|
|
|
+ pinctrl-names = "default", "sleep";
|
|
|
+ pinctrl-0 = <&nand0_pins_a &nand0_pins_b>;
|
|
|
+ pinctrl-1 = <&nand0_pins_c>;
|
|
|
+ nand0_regulator1 = "vcc-nand";
|
|
|
+ nand0_regulator2 = "none";
|
|
|
+ nand0_cache_level = <0x55aaaa55>;
|
|
|
+ nand0_flush_cache_num = <0x55aaaa55>;
|
|
|
+ nand0_capacity_level = <0x55aaaa55>;
|
|
|
+ nand0_id_number_ctl = <0x55aaaa55>;
|
|
|
+ nand0_print_level = <0x55aaaa55>;
|
|
|
+ nand0_p0 = <0x55aaaa55>;
|
|
|
+ nand0_p1 = <0x55aaaa55>;
|
|
|
+ nand0_p2 = <0x55aaaa55>;
|
|
|
+ nand0_p3 = <0x55aaaa55>;
|
|
|
+ chip_code = "sun50iw10";
|
|
|
+ status = "disabled";
|
|
|
+};
|
|
|
+
|
|
|
+&spi0 {
|
|
|
+ clock-frequency = <100000000>;
|
|
|
+ pinctrl-0 = <&spi0_pins_a &spi0_pins_b>;
|
|
|
+ pinctrl-1 = <&spi0_pins_c>;
|
|
|
+ pinctrl-names = "default", "sleep";
|
|
|
+ spi_slave_mode = <0>;
|
|
|
+ spi_dbi_enable = <0>;
|
|
|
+ spi0_cs_number = <1>;
|
|
|
+ status = "disabled";
|
|
|
+
|
|
|
+ spi_board0 {
|
|
|
+ device_type = "spi_board0";
|
|
|
+ compatible = "spi-nor";
|
|
|
+ spi-max-frequency = <100000000>;
|
|
|
+ m25p,fast-read = <1>;
|
|
|
+ /*individual_lock;*/
|
|
|
+ reg = <0x0>;
|
|
|
+ spi-rx-bus-width=<0x01>;
|
|
|
+ spi-tx-bus-width=<0x01>;
|
|
|
+ status="disabled";
|
|
|
+ };
|
|
|
+
|
|
|
+ spi-nand@0 {
|
|
|
+ compatible = "spi-nand";
|
|
|
+ spi-max-frequency=<50000000>;
|
|
|
+ reg = <0x0>;
|
|
|
+ spi-rx-bus-width=<0x01>;
|
|
|
+ spi-tx-bus-width=<0x01>;
|
|
|
+ status="disabled";
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+
|
|
|
+&aliases {
|
|
|
+ nand0 = &nand0;
|
|
|
+ twi6 = &twi6;
|
|
|
+ pwm = &pwm;
|
|
|
+ pwm0 = &pwm0;
|
|
|
+ pwm1 = &pwm1;
|
|
|
+ pwm2 = &pwm2;
|
|
|
+ pwm3 = &pwm3;
|
|
|
+ pwm4 = &pwm4;
|
|
|
+ pwm5 = &pwm5;
|
|
|
+ pwm6 = &pwm6;
|
|
|
+ pwm7 = &pwm7;
|
|
|
+ pwm8 = &pwm8;
|
|
|
+ pwm9 = &pwm9;
|
|
|
+ disp = &disp;
|
|
|
+ lcd0 = &lcd0;
|
|
|
+ lcd1 = &lcd1;
|
|
|
+ lcd2 = &lcd2;
|
|
|
+ eink = &eink;
|
|
|
+ edp0 = &edp0;
|
|
|
+ pmu0 = &pmu0;
|
|
|
+
|
|
|
+};
|
Xunlong26765483